Staff Engineer,Post-Silicon Validation

Tenstorrent • $100K — $500K *
Technical Services
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • 5+ years of experience in SoC bring-up, validation, and silicon debug.
  • Strong grasp of CPU and SoC architectures, especially RISC-V.
  • Comfortable debugging hardware/software issues with lab tools.
  • Experienced in collaborating with RTL, firmware, and software teams.

Responsibilities

  • Lead first-silicon validation of RISC-V CPU-based SoCs.
  • Debug silicon issues across various hardware components.
  • Develop and debug bare-metal tests and boot flows.
  • Collaborate on Linux bring-up and driver validation.
  • Provide feedback to support ECO validation and silicon fixes.

Benefits

  • Highly competitive compensation package.
  • Opportunities for deep hands-on exposure to innovative technology.
  • End-to-end ownership of the silicon lifecycle.
  • Influence over architecture and validation strategy.
Full Job Description
We are looking for a Post-Silicon Validation Engineer to drive bring-up, validation, and debug of RISC-V-based SoCs. This role sits at the intersection of silicon, firmware, and system software, and requires hands-on lab experience and understanding of SoC architectures.

You will own post-silicon validation from first-silicon bring-up through production readiness, working closely with design, pre-silicon verification, firmware, and software teams.

This role ishybrid, based out of Austin TX, or Santa Clara CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are
  • You are a seasoned post-silicon engineer with 5+ years of experience in SoC bring-up, validation, and silicon debug.
  • You have a strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems.
  • You are comfortable debugging complex hardware/software interaction issues using lab tools and low-level software.
  • You thrive in cross-functional environments and enjoy working closely with RTL, firmware, and software teams to solve hard problems.

What We Need
  • Lead first-silicon bring-up of RISC-V CPU-based SoCs and execute post-silicon validation plans.
  • Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
  • Develop and debug bare-metal tests, boot flows, and collaborate on Linux bring-up and driver validation.
  • Provide actionable feedback, support ECO validation, and drive fixes for future silicon revisions.

What You Will Learn
  • Deep hands-on exposure to cutting-edge RISC-V SoCs, AI accelerators, and high-performance compute platforms.
  • End-to-end ownership across the silicon lifecycle-from first silicon to stable production.
  • Advanced silicon debug techniques spanning hardware, firmware, and operating systems.
  • Opportunities to influence architecture, validation strategy, and future silicon direction in a highly visible role.


Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits

About Tenstorrent

Tenstorrent is a semiconductor company that designs and develops computer processors for artificial intelligence and machine learning applications. The company's processors are designed to be energy-efficient and scalable, and are used by a range of businesses, from small startups to large enterprises. Tenstorrent was founded in 2016 and is headquartered in Toronto, Ontario.
Learn more about Tenstorrent
Size
51 employees
Industry
Founded
2016

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