Tenstorrent is seeking a SoC Design Verification Engineer to validate the System Management Controller (SMC) and enable seamless multi-chip integration. In this role, you will design and execute tests, build infrastructure, and debug issues across chiplet-based SoCs. You'll have the opportunity to work with remote mentorship while contributing to the foundation of scalable multi-die systems.
This role ishybrid, based out of Toronto, Ontario, Boston, MA or Santa Clara, CA.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are- Proficient in SystemVerilog, SV-UVM, Python, and C/C++ with strong verification skills.
- Experienced in writing test plans, building infrastructure, and debugging hardware/software flows.
- Comfortable working with remote mentorship and distributed teams.
- Familiar with AI-assisted tools like Copilot, Cursor, and Claude to accelerate verification.
What We Need- Develop and maintain SMC tests and supporting DV infrastructure.
- Write, execute, and track test plans for chiplet and multi-chip SoC designs.
- Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT.
- Triage, analyze, and debug issues in close collaboration with design and architecture teams.
What You Will Learn- Build deep expertise in system management and multi-die SoC verification.
- Gain hands-on exposure to advanced interconnect standards like UCIe and BoW.
- Explore co-simulation methodologies including Cocotb.
- Learn how AI tools can accelerate test generation, infrastructure, and debug workflows.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits
