Ph.D. in Electrical Engineering, Physics, or related field; or Master's with 3+ years of experience
Knowledge of semiconductor device physics for compact modeling
Experience in deep submicron CMOS and BCD device measurement
Proficient with manual, semi-automatic, and automatic probers
Familiarity with active and passive devices in CMOS/BCD technology
Understanding of semiconductor device noise and aging
Experience in SPICE model generation and QA.
Responsibilities
Maintain and operate device lab equipment
Conduct extensive device characterization
Extract SPICE and aging models for semiconductor devices
Stress test devices to evaluate performance post-stress
Develop test structure layouts for devices and arrays
Benefits
Award-winning company culture
Emphasis on inclusion and fairness
Opportunities for community engagement
Focus on enjoyable employee experiences
Career growth in a leading engineering environment
Full Job Description
We're seeking an experienced engineer with device characterization, test chip design, SPICE and device reliability modeling background. In this position, you will be responsible for maintaining device lab equipment functions, performing a wide range of device characterization, and extracting SPICE and device aging models for semiconductor devices.
Required Skills and Qualifications:
Ph.D. in Electrical Engineering or Physics or related engineering discipline, or Master's in Electrical Engineering or Physics or related engineering discipline with 3+ years of experience
Fundamental knowledge of semiconductor device physics related to compact modeling of different types of devices
Proven experience in deep submicron CMOS and BCD device measurement and characterization with parametric analyzer, LCR meter, etc.
Detailed knowledge in using manual, semi-automatic, and automatic probers
Familiar with active and passive devices in CMOS and BCD process technologies
Understanding of semiconductor device noise and matching behaviors
Familiar with physics of semiconductor device aging
Experience in test structure layout of individual devices and arrays
Experience in SPICE model generation and QA flow
Excellent verbal communication skills and technical writing skills
Preferred Skills and Qualifications:
Ability to stress test devices to understand post-stress behavior and SOA
Prior experience with digital and analog design flow and methodology is a plus
Experience running simulations using Cadence ADE
Knowledge and experience in test structure layouts for various technology nodes, including advanced CMOS and BCD/HV for Analog/Mixed-Signal products
Coding skills in Python, Perl or other computing languages
#LI-Hybrid
#LI-TM1
HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
About Cirrus Logic, Inc
Cirrus Logic, Inc. is a fabless semiconductor supplier that specializes in analog, mixed-signal, and audio DSP integrated circuits (ICs). Since 1984, Cirrus Logic has been developing high-precision, analog and mixed-signal integrated circuits for a broad range of innovative customers. Cirrus Logic's products span the entire audio signal chain, from capture to playback, providing innovative products for the world's top smartphones, tablets, digital headsets, wearables, and emerging smart home applications. Cirrus Logic is headquartered in Austin, Texas, with offices in Edinburgh, Scotland, and Shenzhen, China.
