DescriptionAbout the Role: As a
SoC Power Management Architect, you will support and contribute to SoC-level power management architecture. You'll partner with the business unit to understand product power/performance requirements and translate them into SoC and IP-level specification inputs. Working with product and cross-functional teams, you will help deliver robust, data-driven power management solutions where power is constrained. You'll collaborate with global SoC and IP teams to support the development and integration to meet power, performance, and energy-efficiency targets.
What You'll Achieve: - Support end-to-end power management architecture by translating product power/performance goals into actionable SoC/IP requirements under guidance of senior architects.
- Assist in driving SoC and subsystem power management architecture, partnering with Product Power Management Architects to convert product requirements into implementable approaches.
- Collaborate with subsystem architects to assess and expand IP power capabilities by identifying gaps and proposing new features (using data-driven analysis where available).
- Contribute to HW/SW/FW trade-offs to deliver feasible, performant, and verifiable power management solutions.
- Participate in technical direction and architectural reviews, ensuring designs progress toward agreed power management roadmap decisions (escalating as needed).
- Enable HW-SW codesign execution by partnering with senior architects and firmware developers to ensure integration matches architectural intent.
About you: - 3+ years of hands-on SoC power architecture experience , with strong familiarity in SoC low-power concepts
- HW development know-how, supporting specification-to-integration of low-power features, including familiarity with RTL-level design and verification constraints (or close exposure).
- Ability to support power optimization efforts using measured/validation results to improve SoC/IP power-saving and confirm impact on performance and energy.
- Working knowledge of SoC low-power modes and IP low-power capabilities , covering power modes/states, wake-up/latency, and retention behavior.
- Experience supporting SoC-level power management flows.
- Cross-functional collaboration and communication skills . Partnering with various stakeholders and engineering teams.
- Additional skills highly desired: Familiarity with SW/FW; Microcontrollers; HW/SW Co-Design; ARM Architecture; Power States
Education: - BS degree in Electrical Engineering, Computer Engineering, or Computer Science & 5 years of related experience, MS degree & 3 years, or PhD & 0 years
What we'll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $147,000 and $220,000, except in the San Francisco Bay Area where the range is between $159,000 and $239,000.
Our benefits include health, wellness, and financial programs that support employees through every stage of life.
Benefits highlights include:
- Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
- Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
- A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.
And there are much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.
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