What You'll Do Here- Own silicon bring-up and validation from first power-on through feature validation and production readiness.
- Develop and execute validation plans for chip-level and SiP-level functionality, performance, reliability, and system behavior.
- Validate boot, reset, initialization, power management, recovery, memory, interconnect, high-speed interfaces, and package-level functionality.
- Work across Top-level DV, Palladium emulation, lab validation, and package validation to improve coverage and correlation between environments.
- Debug complex failures using logs, registers, traces, waveforms, firmware output, and lab equipment.
- Analyze issues across RTL, firmware, software, board, package, and silicon boundaries.
- Collaborate with architecture, design, DV, emulation, firmware, software, and product engineering teams.
- Define observability and debug requirements and improve validation automation, execution, and failure triage.
Who You Are- Strong hands-on experience in silicon validation, post-silicon bring-up, hardware emulation, Top-level DV, or a related field.
- Experience validating complex SoCs, accelerators, or highly integrated silicon products.
- Strong understanding of digital hardware, SoC architecture, and hardware-firmware interaction.
- Proven ability to debug complex cross-functional failures and drive them to root cause.
- Experience working with real silicon and lab platforms.
- Familiarity with firmware, embedded software, drivers, and low-level hardware access.
- Ability to read and understand C or C++ code for debug purposes.
- Python or similar scripting experience.
- Ability to read specifications, register descriptions, validation plans, and relevant RTL.
- Strong ownership, communication, and cross-functional collaboration skills.
Bonus Points If You Have- Experience with both pre-silicon and post-silicon validation.
- Experience with Cadence Palladium.
- Experience with SystemVerilog, UVM, assertions, coverage, or waveform debug.
- Experience bringing up first silicon.
- Experience with HBM, DDR, PCIe, CXL, Ethernet, die-to-die interfaces, or advanced packaging.
- Familiarity with JTAG, oscilloscopes, logic analyzers, or protocol analyzers.
CompensationThe US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.
- Early Career - $160,000 - $275,000 + equity
- Mid Career - $175,000 - $400,000 + equity
- Senior Career - $250,000 - $600,000 + equity
What We Offer- Time off: 4 weeks PTO (accrued) + 12 company Holidays + up to 3 weeks remote work
- Health: Company-subsidized Medical (Kaiser or Anthem) for employees & dependents, Guardian Dental and Vision insurances for employee & dependents, and life insurance (employee only), plus HSA and FSA offerings via Lively.
- Financial Wellbeing: Choose from Roth IRA/ 401K (or both) retirement plans with up to 5% company contribution to 401K (even if you don't contribute). Also, 100% company-paid life insurance (up to $300K) and long-term disability insurances.
- Professional Development: $1500 Professional Development Budget (per year)
- Team Meals: MatX provides onsite team lunch & dinner Monday - Friday, with your choice of ordering via WeBox, Specialty's or via our reimbursement system
- Commute on Us: Commute on our company Uber account, or reimburse your train rides. Either way, we pay 100% for your daily commute.
- MatX E[x]tras: $50/mo to use on the perk you value most
- Cell & Internet Reimbursement: $35/mo for cellular and $40/mo for wifi
- Mental Wellbeing: 100% paid mental health benefit via SpringHealth and Guardian EAP.
- Support to Parents: Up to 12 weeks paid parental leave regardless of path to parenthood, 10 weeks pregnancy disability leave, flexible return-to-work hours, and Benepass reproductive health & parental benefit.
- AI Resources: Up to $20K/month plus a dedicated internal AI Tooling Team to support your productivity
