Bachelor's degree in Computer Science, Engineering, or related field.
5 years of experience in IT consulting.
Proficient in Hardware Description Languages (HDL) like System Verilog and C.
Experienced with Universal Verification Methodology (UVM).
Knowledge of scripting languages including Python, Unix, and YAML.
Familiar with Gate Level Simulation and industry-standard tools like VCS and Questa.
Understanding of computer architecture concepts such as NoC and AMBA bus protocols.
Responsibilities
Contribute to Gate Level Simulation TestBench architecture and ASIC design verification.
Drive the definition of TestPlan for RTL design based on specifications.
Develop and integrate testcases for RTL verification using SV/UVM/C/Python.
Collaborate with design and architect engineers for TestBench development.
Integrate functional coverage in TestBench using Coverage Driven Verification.
Develop testcases in C for CPU transaction verification as per TestPlan.
Generate random valid input stimulus for testcase regressions.
Benefits
Opportunity to work with cutting-edge technology in a dynamic environment.
Collaborative team culture with opportunities for professional growth.
Exposure to diverse projects and clients across the IT consulting industry.
Potential for travel, enhancing professional networking and experience.
Full Job Description
Silicon Engineering Manager (Accenture LLP; Scottsdale, AZ): Accenture LLP has multiple openings for the position of Silicon Engineering Manager in Scottsdale, AZ, and the job duties are as follows:
Contribute to the development of Gate Level Simulation (GLS) TestBench architecture and verification of ASIC design with provided Netlist by developing or enhancing TestBench, running simulation of testcase suites and debugging failures.
Drive the definition of TestPlan for RTL design through design specification.
Define, develop, and integrate testcases to successfully verify RTL design using SV/UVM/C/Python languages and methodology.
Work closely with design and architect engineers to define, develop and integrate required TestBench developments required for the RTL functional verification.
Define, develop, and integrate functional coverage in the TestBench following Coverage Driven Verification methodology.
Contribute development of testcases in C language to verify CPU based transactions as per the TestPlan.
Define, develop, and integrate random constraints that will generate random valid input stimulus during daily testcase regressions.
Supervise team execution and collaborate with client engineers, vendors, and SoC/SS teams to deliver functional verification requirements in timely manner.
BASIC QUALIFICATIONS:
Must have a bachelor's degree in Computer Science, Technology, Computer Information Systems, Computer Applications, Engineering, or related field, plus 5 years of progressive post-baccalaureate experience in the IT consulting industry.
Must have 5 years of experience in each of the following:
Utilizing Hardware Description Languages (HDL), including System Verilog and C;
Utilizing verification methodology including Universal Verification Methodology (UVM);
Scripting knowledge of Python, Unix, and YAML;
Working with Gate Level Simulation;
Working with industry-standard simulation and debug tools, including VCS, Questa, or Verdi;
Utilizing computer architecture concepts, including NoC, memories, AMBA bus protocols (including AXI, APB, or AHB), and cache systems;
Integrating and configuring third party including, Synopsys and Cadence into TestBench; and
Project planning experience including identifying dependencies.
Must have willingness and ability to travel domestically approximately 80% of the time to meet client needs.
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About Accenture
Accenture plc is a multinational professional services company that provides services in strategy, consulting, digital, technology, and operations. The company has more than 537,000 employees serving clients in more than 120 countries. Accenture operates across five business segments: Communications, Media & Technology; Financial Services; Health & Public Service; Products; and Resources. The company is headquartered in Dublin, Ireland, and has offices worldwide.