Senior Staff Engineer, Digital Verification and Methodology. Join a collaborative team that values diverse perspectives and leads functional verification for advanced integrated circuits while scaling reusable methodologies across global development sites Key responsibilities in your new role • Lead end-to-end verification strategy from requirements analysis through sign-off • Architect reusable SystemVerilog UVM environments and scalable object-oriented testbenches • Implement constrained-random and assertion-based verification with robust functional coverage • Drive metric-driven coverage closure and establish clear quality criteria • Translate specifications and microarchitecture into tests, checkers, coverage models, and sign-off evidence • Improve verification methodologies, automation, and tool flows across projects and development sites • Collaborate with design, firmware, and system teams to debug issues and ensure reliable hardware-software interaction Your profile You bring analytical thinking, clear communication, and collaborative problem-solving. You thrive in a globally distributed environment and build trust across functions while driving results Qualifications and skills to help you succeed • Mandatory: Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or a related technical field • Mandatory: 5+ years in ASIC, SoC, or FPGA functional verification with ownership of complex block, subsystem, or chip-level deliverables • Mandatory: Expert proficiency in SystemVerilog, UVM, object-oriented testbench architecture, constrained-random verification, functional coverage, and assertion-based verification • Mandatory: Ability to translate specifications and microarchitecture into verification plans, environments, tests, checkers, coverage models, and sign-off evidence • Mandatory: Written and spoken English at C1 level • Preferred: Strong debugging skills with a major simulation and debug toolchain and proficiency in Linux development and scripting or programming with Python, Tcl, Bash, C, or C++ for automation • Nice-to-have: Experience with RTL design and digital architecture plus exposure to Ethernet or complex protocols, security verification for cryptographic accelerators or secure subsystems, power-aware verification using UPF, and practical use of AI or machine learning and AI-enabled EDA tools Salary pay information: Location Indicative salary range Lexington, KY, United States Wage range that the company expects to pay for a qualified candidate: US$121,840 - US$182,760 In addition, all employees will be eligible to participate in an incentive plan.