Senior SoC Power Analysis & Optimization Engineer

MatX

$250K — $500K+*
Enterprise Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • BS or MS in Electrical Engineering, Computer Engineering, or related field.
  • 8+ years of experience in SoC, AI accelerator, GPU, ASIC, or high-performance digital design.
  • Strong understanding of computer architecture and SoC design.
  • Experience with ASIC low-power design techniques.
  • Proficient in RTL and gate-level power analysis.
  • Strong analytical and debugging skills.
  • Familiarity with scripting languages like Python or Perl.

Responsibilities

  • Develop and maintain power estimation methodologies for AI accelerator SoCs.
  • Build and calibrate energy models for architectural exploration and power target definition.
  • Perform power analysis across major SoC subsystems at RTL, gate-level, and post-layout stages.
  • Analyze AI workloads to identify opportunities for power reduction.
  • Drive power optimization in various SoC subsystems including compute and memory.
  • Collaborate with architects and designers on power-efficient microarchitecture improvements.
  • Work with physical design teams to evaluate power trade-offs.

Benefits

  • 4 weeks PTO plus 12 company holidays and remote work options.
  • Company-subsidized medical, dental, and vision insurance for employees and dependents.
  • Retirement plans with company contributions and life insurance coverage.
  • $1500 annual professional development budget.
  • Daily onsite meals and reimbursed commuting costs.
  • Monthly stipends for personal perks and reimbursements for cellular and internet services.
  • Comprehensive mental health benefits and paid parental leave.
Full Job Description
What You'll Do Here
  • Develop and maintain power estimation methodologies for AI accelerator SoCs.
  • Build and calibrate energy models for early architectural exploration, design trade-off analysis, and power target definition.
  • Perform RTL, gate-level, and post-layout power analysis across major SoC subsystems.
  • Analyze AI workloads and application use cases to identify opportunities for dynamic and static power reduction.
  • Drive power optimization across compute, memory, interconnect, PCIe, HBM, clock/reset, and other SoC subsystems.
  • Collaborate with architects and RTL designers to implement power-efficient microarchitecture and RTL improvements.
  • Work with physical design teams to evaluate implementation-related power trade-offs.
  • Define representative workloads and sign-off scenarios to improve power analysis coverage.
  • Develop automation, scripts, dashboards, and heuristics to accelerate power analysis and root-cause investigation.
  • Present power analysis results, optimization proposals, and design recommendations to cross-functional teams.

Who You Are
  • BS or MS in Electrical Engineering, Computer Engineering, or related field.
  • 8+ years of industry experience in SoC, AI accelerator, GPU, networking ASIC, or high-performance digital design.
  • Strong understanding of computer architecture and SoC design.
  • Experience with ASIC low-power design techniques.
  • Experience performing RTL and gate-level power analysis.
  • Strong analytical and debugging skills.
  • Experience with Python, Perl, or similar scripting languages.
  • Ability to work independently in a fast-paced environment.
  • Excellent communication and cross-functional collaboration skills.

Bonus Points If You Have
  • RTL development experience using Verilog/SystemVerilog.
  • Experience with one or more of the following:
  • Experience with clock distribution, multiple clock domains, clock gating, and power-aware RTL design.
  • Experience with synthesis, static timing analysis, place-and-route, and implementation flows.
  • Experience using power analysis tools (or equivalent tools) such as: Joules, PowerArtist, PrimeTime PX (PTPX/PPRTL)
  • Experience developing power models, budgeting methodologies, and projection flows.
  • Experience analyzing large power datasets using scripting and data analytics.
  • Experience with power management techniques including: Clock gating, Power gating, Dynamic power management
  • Experience correlating pre-silicon power estimates with silicon measurements is a plus.
  • Experience with AI workload characterization and power-performance analysis is a plus.

Compensation

The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.
  • Early Career - $160,000 - $275,000 + equity
  • Mid Career - $175,000 - $400,000 + equity
  • Senior Career - $250,000 - $600,000 + equity

What We Offer
  • Time off: 4 weeks PTO (accrued) + 12 company Holidays + up to 3 weeks remote work
  • Health: Company-subsidized Medical (Kaiser or Anthem) for employees & dependents, Guardian Dental and Vision insurances for employee & dependents, and life insurance (employee only), plus HSA and FSA offerings via Lively.
  • Financial Wellbeing: Choose from Roth IRA/ 401K (or both) retirement plans with up to 5% company contribution to 401K (even if you don9t contribute). Also, 100% company-paid life insurance (up to $300K) and long-term disability insurances.
  • Professional Development: $1500 Professional Development Budget (per year)
  • Team Meals: MatX provides onsite team lunch & dinner Monday - Friday, with your choice of ordering via WeBox, Specialty9s or via our reimbursement system
  • Commute on Us: Commute on our company Uber account, or reimburse your train rides. Either way, we pay 100% for your daily commute.
  • MatX E[x]tras: $50/mo to use on the perk you value most
  • Cell & Internet Reimbursement: $35/mo for cellular and $40/mo for wifi
  • Mental Wellbeing: 100% paid mental health benefit via SpringHealth and Guardian EAP.
  • Support to Parents: Up to 12 weeks paid parental leave regardless of path to parenthood, 10 weeks pregnancy disability leave, flexible return-to-work hours, and Benepass reproductive health & parental benefit.
  • AI Resources: Up to $20K/month plus a dedicated internal AI Tooling Team to support your productivity

Similar Jobs

More Jobs at MatX

  • Controller
    $220K — $300K *
    Mountain View, CA 94040 (Santa Clara County)
    Manufacturing & Automotive
    In-Person
  • Silicon Validation Engineer
    $160K — $500K+*
    Mountain View, CA 94040 (Santa Clara County)
    Telecommunications & Hardware
    In-Person
  • Power Architect
    $120K — $500K+*
    Mountain View, CA 94040 (Santa Clara County)
    Enterprise Technology
    In-Person
  • Lead Software Engineer, Kernels
    $250K — $500K+*
    Mountain View, CA 94040 (Santa Clara County)
    Enterprise Technology
    In-Person
  • AI Silicon Architect
    $120K — $500K+*
    Mountain View, CA 94040 (Santa Clara County)
    Enterprise Technology
    In-Person

More Enterprise Technology Jobs

Find similar Senior SoC Power Analysis & Optimization Engineer jobs: