Senior NPU Architect

EnCharge AI

$180K — $240K *
US-AnywhereRemote in United States
Consumer Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • BS or MS in Electrical Engineering, Computer Science, or related field (5-8 years experience); Ph.D. preferred with 2-4 years experience.
  • Strong understanding of computer architecture and micro-architecture basics.
  • Familiarity with AI and ML algorithms, frameworks, and workloads.
  • Programming skills in C/C++ and Python.
  • Experience with HDL tools like Verilog or System Verilog.

Responsibilities

  • Define and develop specifications for architecture modules tailored to workload requirements.
  • Model architecture modules in C++ simulation framework for feature implementation.
  • Collaborate with design verification to devise testing infrastructure for architecture features.
  • Analyze performance and efficiency of architecture modules with software teams and other architects.
  • Stay current with AI workload and architecture trends to influence future designs.

Benefits

  • Opportunity to work with cutting-edge in-memory computing technology.
  • Collaboration with a diverse team of architects and engineers.
  • Engagement in innovative AI/ML projects.
  • Potential for professional growth and contribution to future architecture generations.
Full Job Description
About the Role

EnCharge AI is seeking a Senior NPU Architect to join our Architecture Team. In this role, you will collaborate with a team of NPU and system architects, hardware engineers, and software teams to define and optimize key features in our AI accelerator with the cutting-edge in-memory computing technology. You will contribute to designing a holistic AI HW/SW solution that has the best performance and efficiency on the market for the latest AI/ML workloads, such as LLMs, diffusion models, CNNs, and more.

Responsibilities
  • Define and develop the spec, architecture, and micro-architecture of key architecture modules (such as the in-memory compute unit, on-chip network, and memory orchestration units) based on the requirements of the workloads and software deployment flow
  • Contribute to the modeling of aforementioned key architecture modules in our C++ simulation framework to ensure a functional implementation of the features
  • Collaborate with the design verification team to deliver a strategy and infrastructure for the testing of the architecture features within said modules
  • Work with the software team and other architects to analyze the performance and efficiency of the architecture modules for key workloads, identify performance bottlenecks, and guide architectural decisions
  • Stay up to date with the latest trends and research in AI workloads, architectures, and applications to help define a path for the future generations of architectures

Qualifications
  • BS or MS in EE, CS, or a related field with 5-8 years of relevant experience.
    Preferred: Ph.D. in a related field with 2-4 years of relevant experience.
  • Understanding in computer architecture, digital design, and micro-architecture concepts
  • Familiarity with AI/ML algorithms, frameworks, and workloads
  • Programming experience in C/C++ and Python
  • Experience with HDLs such as Verilog or System Verilog

The salary range for this position is $180,000 to $240,000 USD ($175,000 to $245,000 CAD) per year. Actual compensation offered will be determined based on job-related knowledge, skills, and experience.

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