Bachelor's degree plus 8 years of relevant experience or equivalent
Strong experience in FPGA coding and Digital Signal Processing
Proficiency in interfacing FPGA code with existing software
Knowledge of signal processing blocks and DSP components
Experience with Vivado is required
C and C++ coding ability
Active TS/SCI with Polygraph security clearance required
Responsibilities
Lead technical design efforts for FPGA hardware
Implement DSP algorithms in FPGA
Integrate FPGA with existing Linux code
Bridge FPGA and software stack connections
Document design and integration processes
Optimize hardware resources and achieve timing closure
Develop system-level software for subsystems
Benefits
Company Medical/Dental/Vision plans - Company paid
Short-term and long-term disability, and life insurance - Company paid
Business/First Class travel upgrades for long flights
25 vacation/personal days per year
11 paid Federal holidays
$5,000 Annual Professional Development Fund
401K with 6% company match, contributions vested immediately
Referral bonus of $10,000 for new hires
Up to 3 paid Code Red days due to customer closure
Full Job Description
is seeking an experienced senior hardware/software design engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems.
This position requires expertise in FPGA development, digital signal processing implementation, and software-hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts.
This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system-level software) to deliver complete subsystem solutions.
Job Responsibilities/Qualifications:
Mission Focus: Candidate is expected to implement DSP and associated technical components in FPGA for code base integration.
Qualifications: Bachelor's degree plus 8-years of relevant experience or equivalent.
Technical Proficiency: Strong experience required for FPGA coding, Digital Signal Processing theory & application, Interfacing FPGA code with existing code bases and software
Knowledge of signal processing blocks and related DSP components, Linux OS, coding ability in C and C++
Additional experience with Vivado required
Desirable Skills: Experience with Epiq Solution PDK preferred
Security Clearance:
Active TS/SCI with Polygraph required.
BENEFITS:
Competitive salary
Company Medical/Dental/Vision plans - Company paid
Short-term Disability, Long-term disability and Life Insurance - Company paid
Business/ First Class travel upgrade for 7 hour or longer flights & company card will be provided for expenses
Vacation / Personal days granted at 25 days per year
Paid Federal Holidays - 11 days
$5,000 Annual Professional Development Fund plus 40 paid hours if in class
401K with 6% company match; all contributions are immediately vested by Employee
Employee will be paid a bonus of $10,000 per employee hired based on their referral
Up to 3 paid Code Red days due to customer closure
