Your role
SeniorEngineer Digital Verification and Methodology: Join a collaborativeverification methodology team that delivers high-quality integrated circuitsthrough scalable environments, robust planning and continuous improvement. Youwill own key verification capabilities and partner across disciplines toelevate productivity, quality, and reuse
Key responsibilities in your new role
- Create verification plans and translate requirementsinto test scenarios, checkers, assertions and measurable coveragegoals
- Develop and maintain SystemVerilog and UVM environments, reusablecomponents and verification IP
- Execute constrained random and directed verification of digitalmodules and analyze regressions and coverage
- Develop, deploy and maintain reusable verification methodologies, automationand workflow standards across projects
- Own selected methodology capabilities including requirementsdefinition, implementation, documentation, user enablementand continuous improvement
- Evaluate and apply AI-based methodologies for verification planning,test generation, debug, coverage analysis and workflowautomation
- Collaborate with concept, design and application engineeringteams and internal customers to communicate technical risks anddrive verification and methodology scope to completion
Your profile
You are a collaborative problem solver who combines rigorousengineering judgment with a growth mindset. You build trust across disciplines,take ownership of outcomes and communicate with clarity
Qualifications and skills to help you succeed
- Mandatory Degree in Electrical Engineering, ComputerEngineering, Computer Science or related field and strong knowledgeof digital circuit theory and hardware description languages suchas SystemVerilog
- Mandatory Hands-on experience in digital IC verificationusing SystemVerilog and UVM including constrained random, coverage-drivenverification, regressions and debug
- Mandatory Programming or scripting in C, Pythonor Perl and strong Linux skills
- Mandatory Ability to work independently and collaborateacross teams with strong communication, with English level Writtenand Spoken Fluent
- Preferred Experience with formal verification, SystemVerilogassertions, firmware-driven verification or gate-level simulation
- Preferred Knowledge of microcontroller-based ICs, safetyor security requirements or complex protocols
- Nice to have Experience improving and owning sharedmethodologies, enabling users, coordinating technicalcontributors or applying AI-based engineering approaches
#LI-AOO
Salary pay information:LocationIndicative salary rangeLexington, KY, United StatesWage range that the company expects to pay for a qualified candidate:
US$77,360 - US$116,040
In addition, all employees will be eligible to participate in an incentive plan.
Alan Olivarez
https://www.linkedin.com/in/alan-olivarez-91b328203/
