We are seeking a skilled CPU Power Architect to drive and optimize CPU power efficiency across the entire design cycle, from early architectural modeling through RTL implementation to silicon validation! In this role, you will work closely with software, architecture, RTL, physical design, and validation teams to identify power-saving opportunities, guide key design trade-offs, and ensure our CPUs achieve aggressive performance-per-watt goals. You will apply strong technical expertise in power analysis, modeling, and optimization while using silicon data to validate assumptions and refine future designs. Success in this position also requires excellent communication and collaboration skills, enabling you to influence cross-functional teams and help deliver highly efficient CPU products.
What you'll be doing:- Pre-silicon Power Estimation: Model and estimate CPU power at C-model, RTL, and netlist stages using industry-standard tools.
- Power Optimization: Identify inefficiencies and drive design improvements in collaboration with architects, RTL designers, and PD engineers.
- Test Development: Create targeted power characterization tests (e.g., peak power, di/dt stress patterns) for both simulation and silicon.
- Silicon Validation: Set up power measurement equipment and measure CPU power and performance in the lab; correlate silicon results with pre-silicon estimate to refine models.
- Cross-functional Collaboration: Partner with multiple engineering disciplines to achieve optimal power efficiency without compromising performance.
What we need to see:- BS/MS in EE, CE, or CS or equivalent experience.
- 5+ years of experience working in ASIC power measurement and optimization.
- Strong understanding of leakage and dynamic power in VLSI circuits.
- Experience with RTL and netlist power analysis tools such as Power Artist, PrimeTime PX, or equivalent.
- Familiarity with CPU microarchitecture and its impact on power (CPU pipeline design, out-of-order execution, cache hierarchy, branch prediction).
Ways to stand out from the crowd:- Proficiency in using AI tools for automation and data analysis.
- Experience with DVFS, clock gating, power gating, and multi-voltage domain design.
- Knowledge of lab instrumentation for power measurement.
- Strong communication skills for cross-team technical discussions.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 1, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
