As a Process Engineer, you'll play a crucial role in designing and optimizing manufacturing processes for display and semiconductor manufacturing technologies. You will collect and analyze data, perform hardware characterization, and troubleshoot engineering issues. You'll also measure film properties, generate technical documentation, and engage with customers to resolve concerns. Process Engineers collaborate with vendors and suppliers, and become familiar with implementing new technologies and products. You will experiment, learn, and collaborate with some of the brightest minds in the semiconductor and display industries, partnering with our globally recognized R&D teams on state-of-the-art research and development projects.
Join the Photonics Platforms Business Group within the CTO Office at Applied Materials' Santa Clara headquarters, where you will work with a world-class research team developing next-generation silicon photonics packaging technologies.
We are seeking a hands-on Process Engineer to drive die-to-wafer (D2W) hybrid bonding R&D for silicon photonics and co-packaged optics (CPO) applications. This role focuses on hybrid bonding process development, pathfinding, technology de-risking, and integration exploration.
The engineer will develop and evaluate novel bonding flows enabling photonic-electronic co-integration, a critical enabler for AI and HPC systems. The role provides on-the-job training and hands-on experience with state-of-the-art equipment, including the industry's first fully integrated die-to-wafer hybrid bonding system.
Key Responsibilities- Develop die-to-wafer hybrid bonding processes, including (but not limited to):
- Surface preparation and plasma activation
- High-accuracy die placement and alignment
- Post-bond characterization and process evaluation
- Integrate D2W bonding with adjacent process modules such as:
- Dicing and die preparation
- Die thinning
- Inter-die gap fill and planarization
- Design and execute DOE-driven experiments to understand process limits, sensitivities, and trade-offs.
- Own process optimization, perform failure analysis and characterization, and drive continuous engineering improvement.
Qualifications- M.S. or Ph.D. in Materials Science, Electrical Engineering, Mechanical Engineering, Applied Physics, or a related STEM discipline.
- In-depth knowledge and hands-on experience in one or more of the following:
- Die-to-wafer or wafer-to-wafer bonding
- Thin-die handling and alignment-critical processes
- Semiconductor processing and 2.5D/3D integration
- Strong understanding of:
- Bond interface physics
- Alignment and overlay fundamentals
- Mechanical behavior of thin and fragile dies
- Proficiency in statistical analysis and process control (e.g., DOE, SPC, JMP).
- Self-starter with strong problem-solving skills; able to work both independently and collaboratively with minimal supervision.
- Strong communication and interpersonal skills, with the ability to collaborate effectively across multidisciplinary teams.
Additional InformationTime Type:Full time
Employee Type:Assignee / Regular
Travel:Yes, 10% of the Time
Relocation Eligible:Yes
The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation such as participation in a bonus and a stock award program, as applicable.
For all sales roles, the posted salary range is the Target Total Cash (TTC) range for the role, which is the sum of base salary and target bonus amount at 100% goal achievement.
