ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62.
About the roleOwn block-level and SOC-level Performance verification and correlation, debug for our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.
What you'll do- Own block-level and SOC-level Performance verification and correlation, debug for our AI accelerator silicon
- Work closely with software and hardware architects to create tests for performance verification and participate in future architectural decisions
What we're looking for- Exceptional abilities in performance modeling and verification and tool-flow ownership
- Master's + 8 years of experience performance validation/verification on complex SOCs
- Demonstrated ability to debug, co-relate and drive convergence on performance model to RTL alongside RTL designers and architects
- Hands-on with industry-standard tools for tracing, compilation and related workflows
- (Optional) Processor verification, compiler exposure, hardware validation
CompensationFinal offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa SponsorshipDensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export ControlsAspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$200,000-$350,000 USD
