Job Details:About the RoleThis position is in the Logic Technology Development (LTD) team working in one of the most advanced semiconductor cleanroom facilities in the world. You will be designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.
The Advanced Device Development Engineering Manager is responsible for leading scientific research device group enabling the manufacture of innovative device architectures
Key Responsibilities:- Lead a team of device engineers to develop a high-volume capable process technology that meets performance, yield, and reliability requirements for both internal and foundry products. This includes both physical and electrical data analysis, as well as extensive interaction with other technology development teams (integration, module, design/modeling and reliability)
- Set priorities of a team embedded in programs targeted for foundry offerings to get results across boundaries, ensure an inclusive work environment, develop employee careers and manage team performance.
- Work closely with LTD core program integration and device organization to ensure the high-quality Process-Design Kit (PDK) is delivered to design enablement team. It includes extensive Silicon-to-Simulation (or model-hardware correlation) analysis/target projection, layout effect validation and electrical monitors to product parametric correlation.
- Collaborate closely with LTD foundry technology engineering group to ensure the customer achieves leadership product performance and derives maximum value from Intel's advanced manufacturing technologies.
- Define robust test structures and test programs to validate advanced design rules and reliably extract key device parameters.
- Use Statistics, Data Mining, and other data analysis techniques to collect, explore, and extract insights from Electrical-test, yield, and fab data to define future development direction.
Required Skills and Experience- Experience in advanced node semiconductor industry in one or more of the following:
- Semiconductor materials
- Fabrication
- Device physics
- Electrical characterization of Semiconductor Devices (transistor, diode, etc.)
Preferred Skills and Experience- Advanced Transistor Device Structures and Device Physics.
- Process monitoring Test structures design and layout experience.
- Device and circuit simulation.
- Statistical Process Control (SPC) or Design of Experiments (DOE) principles and engineering analysis tools.
- Expertise in database structures, research methods, machine learning, analytics packages (i.e., JMP, MATLAB, Octave), scripting languages (i.e., JSL, Perl, TCL), or programming languages (i.e., Python, SQL, C/C++)
- Expertise in agentic AI and orchestrated LLM workflows, machine learning, deep learning, Retrieval-Augmented Generation (RAG), knowledge engineering, and dataflow pipeline architectures.
Qualifications:- Degree in Electrical Engineering, Physics, Material Science, or scientific field of study directly related to Semiconductor.
- Ph.D. with 10+ years of experience in advanced node semiconductor industry OR Masters with 15+ of experience.
Job Type:Experienced Hire
Shift:Shift 1 (United States of America)
Primary Location:US, Oregon, Hillsboro
Additional Locations:US, California, Folsom, US, California, San Diego, US, California, Santa Clara
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $224,970.00-317,600.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
