Worker Type

Job Description

Summary

The primary role of the Hardware Design Engineer is to lead FPGA architecture, design, and development efforts in support of advanced embedded systems solutions. This position works closely with software and system engineers to architect, implement, verify, and debug FPGA and embedded firmware designs. The ideal candidate is technically strong, adaptable, customer-focused, and capable of leading small technical efforts while mentoring junior engineers and contributing to continuous innovation.. 

Position Responsibilities:

• Lead FPGA architecture, design, coding, verification, and lab debug activities
• Develop and analyst RTL using VHDL, Verilog, or System Verilog
• Perform FPGA synthesis, place & route, and timing analysis using industry standard tools (e.g., Vivaldo, Quartus)
• Develop and execute test benches for verification and validation
• Collaborate with software and system engineers to define hardware/firmware interfaces
• Integrate and validate FPGA designs within embedded systems environments
• Mentor junior engineers and contribute to technical leadership initiatives

Required Qualifications:

• Bachelor's degree in Electrical Engineering or Physics is required or equivalent combination of education, training, and experience
• Minimum of 6 years of experience
• Experience with RTL development (VHDL, Verilog, or System Verilog) 
• Experience with FPGA Design, synthesis, P&R tools (ex-Vivaldo, Quartus) 
• Experience developing Verilog/System and Verilog test benches
• Exposure to DSP concepts and Signals & Systems
• Experience working in Linux and/or Windows environment
• Strong oral/written communication
• An active Top Secret

Desired Qualifications:

• Master's or PhD in Electrical Engineering, Computer Engineering, or related technical field
• Experience with Software Defined Radio (SDR) concepts & tools (GNU Radio, Matlab, etc.)
• Experience with C/C++, Bash, Tcl/TK, and GitLab 
• Experience with FPGA design using Xilinx's Vivaldo Tool Suite 
• Experience using soft/hard IP cores in FPGAs/ASICs (ex Zynq or Microblaze or RISC processors, memories, flash/NVM) 
• Exposure to embedded software development 
• Exposure to PCB design and development 
• Python scripting

Salary Range: $125000 – $240,000

The pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Determination of official compensation or salary relies on several factors including, but not limited to, level of position, job responsibilities, geographic location, scope of relevant work experience, educational background, certifications, contract-specific affordability, organizational requirements, alignment with local internal equity as well as alignment with market data.

Our compensation package also includes components designed to support employees’ total well-being, which should be considered when evaluating our competitive benefits package. These benefits include health insurance, life insurance, disability, company holiday and paid time off, parental leave, 401(k) company match and contributions, professional development/training reimbursements, and other work/life programs.

ITAR Requirement:

This position requires access to information that is subject to compliance with the International Traffic Arms Regulations (“ITAR”) and/or the Export Administration Regulations (“EAR”). In order to comply with the requirements of the ITAR and/or the EAR, applicants will be asked to provide specific documentation to verify U.S. person status under the ITAR and the EAR.  A “U.S. person” according to their definition is a U.S. citizen, U.S. lawful permanent resident (green card holder), or protected individual such as a refugee, or asylee. See 22 CFR § 120.15. Some positions will require current U.S. Citizenship due to contract requirements.

Benefits:  AV offers an excellent benefits package including medical, dental vision, 401K with company matching, a 9/80 work schedule and a paid holiday shutdown.  For more information about our company benefit offerings please visit:  .

Principals only need apply.  NO agencies please.