We are hiring FPGA Verification Engineers to build and maintain the verification infrastructure for satellite avionics FPGA designs. You will develop UVM-based testbenches, create coverage-driven verification plans, and ensure RTL correctness for flight-critical FPGA firmware across multiple subsystems. This role is instrumental in establishing a rigorous verification methodology for the program.
Key Responsibilities:- Develop UVM-based verification environments including agents, scoreboards, and bit-accurate reference models.
- Create and maintain a reusable, extendable UVM framework supporting multiple FPGA targets and device configurations.
- Write verification plans derived from requirements specifications and architectural documents.
- Develop functional coverage models and drive coverage closure for all FPGA designs.
- Perform RTL simulation using industry-standard tools.
- Implement clock-domain crossing verification and timing/stability analysis.
- Apply lint and static-analysis tools to identify design issues early in the development cycle.
- Support hardware bring-up by creating tests that model and recreate hardware interactions in simulation.
- Document verification results, coverage metrics, and test plans with clear technical writing.
- Collaborate with FPGA designers and system engineers to refine requirements and close verification gaps.
Required Qualifications:- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 4+ years of experience in FPGA or ASIC verification.
- Strong expertise in SystemVerilog and UVM-based verification methodology.
- Experience building UVM agents, environments, and generating constrained-random stimulus.
- Proficiency with at least one industry-standard RTL simulator.
- Understanding of functional coverage techniques and coverage-driven verification.
- Ability to read and understand PCB schematics and hardware interfaces for test development.
Preferred Qualifications:- Experience verifying designs for space, aerospace, or high-reliability applications.
- Familiarity with formal verification tools.
- Background in embedded software interaction with FPGA firmware.
- Experience with continuous integration workflows for verification regressions.
- Proficiency in Python, TCL, or shell scripting for test automation and infrastructure.
- Exposure to DFMEA and high-reliability digital design review processes.
Tools & Technologies:- Industry-standard RTL simulators (e.g., VCS, QuestaSim, or equivalent)
- UVM verification methodology
- Lint and CDC analysis tools
- Python/TCL scripting for automation
$150,000 - $250,000 a year
This is a full time, exempt position, based out of our Saratoga office. The total compensation packaged will be determined by various factors such as your relevant job-related knowledge, skills, and experience.
We are redefining how satellites are designed, manufactured and used-so we're looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in-orbit activities. If that's your experience - then we'll be immediately wow-ed.
E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.
