Develop Design-for-Test (DFT) Verification Framework for different DFT Features(Memory Test, Logic Test, Analog IP) using AI , generation of verification summary and dashboard results for block level and chip level. In this role you will developing Design for Test Methodology for NextGen Rivian Autonomy Processor. Responsibilities • Creating Block level, Chip Level Verification setup using Post -DFT RTL/Netlist. • Run simulation using the test list or patterns. • Memory Built-in Self test[MBIST] Verification Report Generation • Analog IP(PVT, Serdes PHY, DDR PHY) Tests Verification report generation • Scan/ATPG Verification, Test Coverage Report Generation. Qualifications • Must be currently pursuing a bachelors, masters, or PhD degree at an accredited university. Masters preferred. • Actively pursuing a degree or one closely related in Electrical Engineering, Computer Engineering, or Computer Science • Digital Logic design • RTL Coding like Verilog /VHDL/System Verilog • TCL/Python Scripting • Design/Verification knowledge. • Familiar in using EDA tools #LI-HH2 Pay Disclosure The salary range for this role is $45.00-51.00 per hour for Palo Alto based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee's position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs. We offer a comprehensive package of benefits including but not limited to paid vacation, paid sick leave, and medical insurance benefits. Internship positions are not eligible for retirement benefits. More information about benefits is available at rivianbenefits.com. You can apply for this role through careers.rivian.com (or through internal-careers-rivian.icims.com if you are a current employee). There is no fixed deadline for this application; applications are accepted on an ongoing basis until the role is filled or the opening is no longer needed.