ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62.
About the roleDesign and bring up the electrical hardware that turns our AI accelerator silicon into working systems - boards, power delivery, and system-level electrical design from schematic through lab bring-up and validation. You'll sit at the seam between silicon/packaging and the systems our accelerators run in, and own the board-level hardware that makes them work.
What you'll do- Own schematic design and drive PCB layout for accelerator boards and system hardware - high-speed digital, power delivery, and clocking
- Design and validate power-delivery networks (PDN) and rails for high-current accelerator silicon; partner with SI/PI and packaging on the board <-> package interface
- Bring up new boards in the lab - debug, characterize, and validate against spec using scopes, logic/protocol analyzers, and power/thermal instrumentation
- Drive component selection, DFM/DFT for boards, and work with contract manufacturers and vendors through fab, assembly, and yield
- Partner across silicon, packaging, SI/PI, thermal, and firmware/bring-up teams to close electrical issues end to end
- Use and develop AI-assisted tool flows to accelerate design and debug
What we're looking for- BS/MS in Electrical Engineering plus 5+ years in board/system-level electrical design for complex high-speed digital systems
- Schematic capture and PCB design (Altium, Cadence Allegro, or equivalent), including high-speed interfaces (DDR/LPDDR, PCIe, SerDes) and power-delivery design
- Hands-on lab bring-up and debug: oscilloscopes, logic and protocol analyzers, power and thermal characterization
- Solid grounding in signal integrity, power integrity, and EMC at the board level
- (Optional) High-current PDN for accelerators/GPUs; server/board design at hyperscale; FPGA-based systems; firmware / low-level bring-up; thermal co-design; ANSYS HFSS/SIwave or equivalent EM tools
CompensationFinal offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa SponsorshipDensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export ControlsAspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$200,000-$320,000 USD
