About the role: Our Hardware Design Engineering organization is seeking a Distinguished Signal Integrity Engineer to be part of a team implementing high-performance solutions for high-bandwidth, connectivity-intensive multi-core processor products, requiring co-design of silicon, package, and PCB
What you'll achieve: - Design/simulate/validate high-performance interconnect solutions, while working with chip designers, package designers, as well as PCB designers (of Ampere and external customers), to achieve end-to-end solutions that provide robust signal integrity performance
- Develop layout guidelines - package and PCB - and SI/PI documentation for use by internal and external customers
- Support product bring-up and customer engagements
- Drive state-of-the-art signal integrity analysis methodologies
- Influence Ampere's technology roadmap by delivering technical leadership in next-generation interconnects, advanced packaging, and cross-functional system co-design
About you: - Experience in designing high-performance signal interconnect solutions
- Preferred to have experience with both large body-size electronic packages and high-performance PCBs
- Deep knowledge of transmission line and electromagnetic theory related to signal integrity and power integrity
- Good working experience of parallel and serial interfaces, with emphasis on deep expertise for high speed SerDes such as PCI-gen5/6/7 and/or USB/USB-C, etc.
- Knowledge of different simulation methodologies, time domain and statistical, with the ability to create and simulate 3D models in tools like HFSS, SIWave and PowerSI
- Familiarity with link timing budgeting
- Expert of end-to-end channel modeling (using HFSS/SIWAVE/PowerSI) and link budget analysis with both time domain and statistical simulation
- Understanding of behavioral IO models (IBIS, IBIS-AMI) and different equalization techniques, CTLE, DFE and TX equalization.
- In depth understanding of SerDes TX/RX equalization techniques and its modeling in IBIS-AMI
- Understanding of AC/DC power delivery, power integrity analysis and how to perform simultaneous switching noise analysis for memory interfaces.
- Good understanding of power delivery impact on clocking and IO
- Good understanding of stack up manufacturing process and design limitations considering DFM
- Strong communication, interpersonal and collaboration skills
- Electrical or Computer Engineering - Bachelor's degree & 15 years of related experience; or master's degree & 12 years; or PhD & 8 years
What we'll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $279,500 and $419,500, except in the San Francisco Bay Area where the range is between $293,000 and $440,000.
Our benefits include health, wellness, and financial programs that support employees through every stage of life.
Benefit highlights include:
• Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
• Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
• A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.
And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.
#LI-TC
#LI-Hybrid
