About the RoleWe are seeking a Director of ASIC Verification who leads from the front: you'll own verification strategy, sign-off, and the team - and you'll also be one of the strongest hands-on verification engineers here, writing testbenches, closing coverage, and debugging the hardest failures.
This role will be performed onsite from our office in Santa Clara, CA.
Essential Duties & Responsibilities- Own verification end-to-end: strategy, methodology (UVM, formal, emulation, coverage-driven closure), tape-out sign-off for Netpreme silicon, IP, subsystems and post silicon bringup support including test-vector generation.
- Architect and author verification environments and testplans, review testbench code line-by-line, and personally drive debug of the hardest protocol, coverage, and bring-up issues
- Recruit, lead, and develop a world-class verification organization that treats technical depth as the currency
- Present verification readiness, metrics, and risk posture to engineering
leadership with conviction
Qualifications- BS/MS in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of progressive ASIC/SOC verification, with 5+ years leading verification teams
- Demonstrable experience writing verification code, building testbenches, and closing coverage
- Multiple tapeouts in advanced process nodes where you owned both deep technical work and sign-off
- Hands-on experience with high-speed protocol IP - Ethernet, UCIe, UALink, or comparable
- Fluent across the full ASIC/SOC lifecycle - microarchitecture through tape-out - on designs integrating interconnect, I/O, and memory subsystems
- Executive communication skills; proven ability to manage risk, escalations, budget, and headcount on startup timelines
Preferred Qualifications- PhD in EE, CE, or related field
- Built a verification team from zero at an early-stage startup while delivering milestones personally
- Hands-on post-silicon bring-up, debug, and validation leadership
- AI/datacenter accelerator background; familiarity with LLM memory/dataloader bottlenecks
- Knowledge of DFT and its interaction with front-end verification
Compensation & Benefits- Competitive salary with performance-based bonus and early-stage equity grant
- 100% employer-paid Health, Dental, and Vision coverage for you and your dependents
- 401(k) match with immediate vesting, and access to financial advisors to help you reach your financial goals
- 100% employer-paid Life, Disability, and AD&D insurance, plus a fitness stipend and wellness & mental health perks
- Generous PTO: 20 vacation days, 15 company holidays (including 3 floating days of your choosing)
- Daily lunch stipend
- Enterprise-level Claude & ChatGPT access with a generous token budget
- Well-equipped, sunny offices in Santa Clara, CA & Cambridge, MA with on-site parking and EV charging; on-site fitness center in Santa Clara; gym discounts near our Cambridge office
- Visa sponsorship and relocation assistance to one of our office hubs
