Full Job Description
TSMC's Power Management Research and Design Department, in Austin, TX, is looking for an exceptional Power Management design and verification engineer to work as part of the PMIC design team.
In this role, the candidate will be part of the engineering team responsible for defining next generation semiconductor technology, including inductors, capacitors, transistors, and packages with emphasis on PMIC products powering the next generation of Artificial Intelligence processors.
An ideal candidate for this role will have a hands-on background in power system design, verification, and characterization.
Minimum Qualifications
• MSEE with 7+ years of Industry Experience in Hands-On Power Management Design or Equivalent
• Working knowledge of SIMPLIS simulator or equivalent
• Successful projects demonstrating PCB Design and Layout, specific to power management and delivery
• Familiar with IC Design and IC Packaging
• Strong Teamwork and interpersonal skills
• Power Delivery Design and Modeling
Pay Transparency / Benefits statement
At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $120,000 and $170,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC's total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.
Date: May 29, 2026
Country/Region: US
City: Austin
Company: TSMC Technology, Inc.
