Proficient in Verilog RTL design with experience in the silicon development lifecycle
Knowledge of embedded processor systems and C coding
Familiarity with logic simulators and power analysis tools
Experience with analog and mixed signal designs
Scripting skills in Python, Perl, or Tcl
Experience with version control systems like Git or Perforce
Strong communication skills
Self-driven with a high output capability
Familiarity with AI tools for productivity enhancement
Responsibilities
Develop complex SoC architectures with multiple processors and subsystems
Design RTL modules using System Verilog HDL
Conduct architecture and design reviews throughout the project lifecycle
Integrate digital and mixed-signal IPs at the SoC level
Perform logic synthesis and timing/power analysis
Collaborate with backend teams to optimize design performance
Conduct pre-silicon verification with test benches
Support validation and bring-up of designs on silicon
Benefits
Comprehensive medical, dental, and vision plans
401k plan with matching and Roth options
Equity rewards (RSUs)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-up childcare services
Flexible PTO schedule
Paid volunteer days
Charitable contribution matching
Tuition reimbursement
Free downtown parking
Onsite gym access
Monthly wellness offerings
Free snacks
Company updates with the CEO
Full Job Description
Digital Design Engineer II Austin, TX
The Role As a Digital Design Engineer II you will develop world class, highly integrated, low power, System on a Chip devices to serve the IoT wireless market.
Responsibilities
Develop complex SoC/chip Architectures with multiple processors, digital and mixed signal subsystems, multiple power, and clock domains with a goal towards optimizing power for specific customer scenarios.
RTL design of modules through System Verilog HDL coding, adhering to quality standards.
Prepare and hold architecture, design, and verification reviews with technical staff throughout project lifecycle
SoC level configuration and integration of digital and mixed-signal IPs. Examples include embedded processors, memory and controllers, busses, power and clocking systems, security systems, machine learning, radio systems, analog IP, and pads.
Perform logic synthesis, full chip timing and power analysis to optimize designs for key customer scenarios.
Experience in working with backend team to optimize design for power performance and area.
Pre-silicon verification utilizing a combination of block/chip-level test benches.
Validation/bring-up of designs on silicon, providing support to cross-functional teams
Skills You Will Need
Minimum Qualifications:
Master's degree in Electrical Engineering
3-5 years of professional experience in digital CMOS IC design
Verilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to production
Knowledge of embedded processor systems and C coding
Experience with logic simulators for both RTL and gate-level simulation, design/waveform browsers, and power analysis tools
Experience with logic synthesis and timing constraints
Experience in working with analog and mixed signal designs, to support design integration and verification of these subsystems in SOC.
Experience with scripting and automation. Knowledge of Python, Perl, and Tcl
Experience with revision control and configuration management systems (such as Perforce, Git, Methodics)
Excellent written and verbal communications skills
Demonstrated ability to generate high output in a self-driven manner
Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making
Benefits & Perks
You can look forward to the following benefits:
Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
Highly competitive salary
401k plan with match and Roth plan option
Equity rewards (RSUs)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-Up childcare
Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
Flexible PTO schedule
3 paid volunteer days per year
Charitable contribution match
Tuition reimbursement
Free downtown parking
Onsite gym
Monthly wellness offerings
Free snacks
Company updates with our CEO
#LI-KB1
#LI-Hybrid
The annualized base pay range for this role is expected to be between $101,500 - $188,500 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant's skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.
