8+ years of experience in SoC, CPU, GPU, accelerator, or networking architecture.
Proven history of guiding architectures from specification to tapeout.
Strong skills in performance modeling using C++, SystemC, Python, or similar.
In-depth knowledge of memory systems, interconnects, cache coherence, and PPA trade-offs.
Excellent technical writing skills and experience leading cross-team reviews.
Responsibilities
Own architecture and microarchitecture for SoCs, subsystems, and IP blocks from requirements to specification.
Build performance, power, and area models to inform design trade-offs prior to RTL development.
Define memory hierarchies, interconnects, and interfaces, and lead architecture reviews.
Write specifications for RTL, verification, and physical design teams to follow.
Collaborate with ML researchers to enhance models that simulate expert architectural reasoning.
Engage directly with customers to convert their product needs into silicon solutions.
Benefits
Opportunity to work on cutting-edge silicon programs with leading semiconductor companies.
Engagement in innovative projects that integrate AI into architecture design.
Collaborative environment with cross-functional teams, including ML researchers and customers.
Full Job Description
About this Role
You'll define the architecture of complex SoCs and subsystems, from performance models to the specs that RTL teams build against. You'll work on real silicon programs with the world's largest semiconductor companies while shaping how Voltai's AI reasons about architecture, trade-offs, and design intent.
What You'll Do
Own architecture and microarchitecture for SoCs, subsystems, and IP blocks, from requirements through specification.
Build performance, power, and area models to drive trade-off decisions before RTL is written.
Define memory hierarchies, interconnects, and interfaces, and lead architecture reviews.
Write specifications that RTL, verification, and physical design teams can execute against.
Partner with ML researchers to teach models how expert architects reason about design trade-offs, and evaluate the architectures they propose.
Work directly with customers to translate their product requirements into silicon.
What We're Looking For
8+ years of experience in SoC, CPU, GPU, accelerator, or networking architecture.
Track record of taking architectures from spec to tapeout.
Strong performance modeling skills (C++, SystemC, Python, or equivalent).
Deep understanding of memory systems, interconnects, cache coherence, and PPA trade-offs.
Clear technical writing and the ability to lead reviews across teams.
Bonus Points
Experience with AI/ML accelerators or chiplet-based designs.
Hardware/software co-design experience.
Interest in how AI can change architecture exploration.
