Role OverviewAs a Senior Architecture & Performance Modeling Engineer, you will help shape the architecture of our next-generation AI inference accelerators. You will work directly with chip architects to explore architectural options, quantify tradeoffs, identify bottlenecks, and turn modeling results into actionable design recommendations.
This work starts before RTL exists. You will use analytical models and our in-house simulators to answer architectural questions quickly, then refine and validate those models as the design matures. Each engineer on the team takes primary modeling responsibility for a next-generation chip while contributing to a shared modeling framework.
Key ResponsibilitiesArchitecture Studies and Recommendations- Partner with architects to turn design questions into focused modeling studies with clear assumptions, alternatives, metrics, and recommendations.
- Perform what-if analysis across compute engines, memory capacity and bandwidth, dataflow, DMA, command processing, on-chip interconnect, and chip-to-chip communication.
- Compare architectural options, explain performance sensitivities, and recommend changes within the system, power, area, and implementation constraints established with the architecture team.
Workload Analysis- Evaluate representative AI inference workloads across prefill and decode, batch sizes, context lengths, and dense and mixture-of-experts models to identify what limits latency, throughput, and hardware utilization.
- Provide timely feedback throughout the design cycle by communicating findings, investigating unexpected results, and updating studies as workloads and architectural choices evolve.
Model Development and Correlation- Develop and extend analytical, transaction-level, and cycle-level models, choosing the level of detail needed to answer each question with useful turnaround time.
- Maintain reusable models in our native Rust simulator and correlate predictions against RTL simulation, emulation, or silicon measurements as they become available, with regression coverage and clear documentation of assumptions, limitations, and discrepancies.
Required Qualifications- 5+ years of experience in computer architecture, microarchitecture, or performance modeling for accelerators, CPUs, or GPUs.
- Demonstrated experience using models to influence architectural decisions, such as identifying a bottleneck, comparing design alternatives, or recommending a change backed by quantitative analysis.
- A strong understanding of pipelines, queues, parallel execution, memory hierarchies, data movement, and interconnects.
- Hands-on experience building analytical, transaction-level, or cycle-level performance models, including first-order estimates that help validate and explain simulation results.
- Comfort working with incomplete specifications, making assumptions explicit, and balancing modeling fidelity with speed of iteration.
- Strong Rust skills, or expert-level C/C++ skills and a willingness to work in Rust day to day, along with proficiency in Python for workload analysis, experiments, and visualization.
- Ability to read SystemVerilog RTL and relevant verification results, reconcile them with architectural specifications, and calibrate models as implementation details become available.
- Excellent communication skills, with the ability to explain what drives a result, how much confidence to place in it, and what the architecture team should investigate or change next.
Preferred Qualifications- Experience with LLM inference, including attention, KV caches, quantization, mixture-of-experts workloads, and parallelism across multiple chips.
- A track record of connecting workload behavior and software execution choices to hardware performance.
Leveling & ScopeWhile this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.
Why Join Us?- You will own the performance modeling for a next-generation inference chip and see your analysis shape real architectural decisions before RTL is written.
- You will work side by side with the architects behind Asimov and Titan on the hardware that defines how frontier models are served at scale.
Compensation & BenefitsThe base salary range for this role for Senior: $220,000 - $270,000, for Principal: $270,000-$350,000.
Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.
At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.
Benefits & PerksWe want you to do your best work and feel confident that you and your family are taken care of. That means comprehensive coverage, real time to rest, and support for your future.
Health and wellness- Fully company-paid medical, dental, and vision insurance for you and your dependents
- Company-paid life and disability coverage, with voluntary options to add more
- Supplemental hospital, critical illness, and accident coverage available
Time off and flexibility- Unlimited paid time off; we encourage everyone to truly unplug and recharge
- 13 paid company holidays
- Remote-first culture with a company-provided computer and home office setup
Compensation and future- Competitive salary and equity
- 401(k) with company matching, eligible from day one
Visa SupportThis position is open to candidates currently authorized to work in the U.S. We cannot provide new visa sponsorship for this role but are open to facilitating H-1B visa transfers for eligible candidates.
