Deep knowledge and hands-on experience in memory subsystem design and implementation
Understanding of LLM inference workloads and their impact on memory subsystems
Familiarity with memory tiering benefits and limitations for various workloads
Experience with CXL and other memory pooling protocols (nice to have)
Experience in designing and implementing memory controllers (nice to have)
Background in processing in memory and unique memory subsystem projects (nice to have)
Responsibilities
Contribute to the design and ownership of the memory subsystem
Develop and optimize the distributed memory fabric
Interface with XPUs and compute complex for seamless integration
Analyze and enhance memory controller performance
Evaluate memory tiering strategies for diverse workloads
Benefits
Opportunity to work on the largest and highest bandwidth memory system
Engagement in cutting-edge technology and innovative projects
Collaborative work environment with industry experts
Potential for professional growth and skill enhancement
Full Job Description
What We're Looking For:
We're looking for memory subsystem architects to contribute and own aspects of the memory subsystem for the largest and highest bandwidth memory system ever built to date. This includes the distributed memory fabric, memory controllers, interface with the XPUs/compute complex, etc.
Ideal Candidates:
Ideal candidates will have:
Deep knowledge and hands-on experience in the design and implementation of memory sub-systems
Understand LLM inference workloads and what the impact of that for the memory subsystem is
Understand the benefits and limitations of memory tiering for various workloads
Nice to Have:
Experience with CXL and other memory pooling protocols
Experience with design and implementation of memory controllers
Experience with processing in memory and other "unique" memory subsystem projects and efforts
