Opportunity Overview Teradyne's Semiconductor Test Division in Agoura Hills, CA is seeking aAnalog Design Engineer to develop high-speed analog and mixed-signal ASICs for Automatic Test Equipment (ATE). The ideal candidate will have experience in CMOS circuit design and successful ASIC tape-outs, along with strong analytical, problem-solving, and communication skills. This role offers the opportunity to collaborate across multidisciplinary teams while leveraging AI-powered tools, automation, and data-driven methodologies to accelerate semiconductor innovation. A passion for emerging technologies, continuous learning, and technical excellence is highly valued.
Responsibilities include:
- Design and optimize high-speed analog and mixed-signal circuits from specification through transistor-level implementation.
- Validate and integrate designs using Cadence EDA tools across PVT corners, while supporting layout and ASIC integration.
- Participate in silicon characterization, debug, validation, and production test activities.
- Develop automation, scripting, and AI-assisted workflows to improve design productivity, verification, and data analysis.
- Collaborate across design, validation, test, and EDA teams to advance AI-enabled IC design methodologies.
All About You We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.
- MSEE or higher preferred, with 2+ years of experience in mixed-signal IC design and characterization; FinFET (16nm and below) experience is a plus.
- Strong knowledge of high-frequency analog/mixed-signal IC design, including PLLs, DLLs, ADCs, DACs, VCOs, CDRs, amplifiers, clocking circuits, high-speed I/Os, and CML designs.
- Solid understanding of CMOS device physics, semiconductor processes, PDKs, thermal effects, and electromagnetic principles.
- Experience throughout the IC development lifecycle, including silicon characterization and laboratory measurements.
- Familiarity with AI/ML techniques, generative AI, and large-scale data analysis for semiconductor design, validation, and test applications.
- Proficiency in scripting languages (Python/SKILL/Ocean) for automation and data analysis; Verilog/Verilog-A experience is a plus.
Compensation: The base salary range for this role is $127,500 to $204,100. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.
Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.
Benefits: Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more. Please click here to see details.
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