Technical Program Manager, Hardware

DensityAI

$190K — $320K *
Telecommunications & Hardware
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • 5+ years of technical program/project management in hardware or complex software roles
  • Strong technical fluency with chip design and software dependencies
  • Hands-on experience with systems programming including C/C++ or Rust
  • Demonstrated ownership of schedules and risks in large multi-team programs
  • Excellent communication skills across technical and executive levels
  • Comfortable operating in ambiguous, fast-paced environments
  • (Optional) Experience with ASIC/SoC development and relevant tools

Responsibilities

  • Own end-to-end program management for hardware workstreams
  • Drive cross-functional execution across silicon and software teams
  • Bridge hardware and software by coordinating firmware and driver development
  • Run the program's operational cadence including planning and milestone tracking
  • Identify and resolve critical-path risks proactively
  • Translate technical blockers into decisions and assist team with triage
  • Build scalable, lightweight tracking processes for engineering teams

Benefits

  • Medical, dental, and vision insurance
  • 401(k) retirement plan
  • Standard Paid Time Off (PTO)
  • Equity grants per company guidelines
  • Immigration support for visa sponsorship
Full Job Description
ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62.
About the role

Drive the cross-functional execution of our AI accelerator hardware program - owning the schedules, dependencies, and risk across silicon, board/system hardware, and the low-level software that brings it to life, from architecture through tapeout, bring-up, and scale-out. [+] You're technical enough to go a level deeper than a typical PM: comfortable in the systems-programming layer (firmware, drivers, bring-up software) where hardware and software meet, not just tracking it from the outside.
What you'll do
  • Own end-to-end program management for major hardware workstreams - schedule, dependencies, critical path, and risk from architecture through tapeout and silicon bring-up
  • Drive cross-functional execution across silicon (design, DV, physical design, packaging), board/system hardware, and software teams; align milestones and clear dependencies
  • Bridge hardware and the systems-software stack, coordinate (and where useful, hands-on contribute to) firmware, device drivers, and bring-up software that exercises new silicon and boards
  • Run the program operating cadence. Planning, milestone tracking, status, risk reviews, and crisp executive communication
  • Identify critical-path risks and drive them to resolution before they slip the schedule; own tapeout readiness and milestone gating
  • Translate low-level technical blockers (bring-up failures, driver/firmware issues, HW/SW integration bugs) into program decisions, and help the team triage them rather than waiting on a single owner
  • Build lightweight tracking and process that scales with the team without slowing engineers down
What we're looking for
  • 5+ years of technical program/project management in hardware, silicon, or deeply technical software, driving complex cross-functional programs to delivery
  • Strong technical fluency - you can hold your own with chip-design and software engineers and understand the dependencies between RTL/PD/DV/packaging and compiler/runtime/bring-up
  • Systems-programming background: hands-on C/C++ (and/or Rust), Linux internals, firmware, device drivers, or bring-up software - enough to read the code, dig into low-level issues, and earn engineers' trust
  • Demonstrated ownership of schedule, critical path, and risk on a large multi-team program, ideally through a silicon tapeout or a comparable hardware milestone.
  • Excellent communication and stakeholder management, from IC engineers to executives
  • Comfort operating in ambiguity at startup pace; bias to action; lightweight, high-trust process
  • (Optional) Silicon program experience through tapeout/bring-up; ASIC/SoC development lifecycle; hardware/software co-development; Jira/Confluence; PMP or Agile; AI/ML or accelerator domain
Compensation

Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship

DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.

Full compensation packages are based on candidate experience and relevant certifications.

California pay range

$190,000-$320,000 USD

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