We're hiring a Staff Digital Design Engineer at our San Diego, CA!

Salary Range: $139,000 - 232,182 annually
(Final offer based on experience, education, skills, and market factors)

RFE5682 Staff Digital Design Engineer

Job Description

Exempt: Yes
Safety Sensitive: No

GENERAL DESCRIPTION OF POSITION
The Staff Digital Design Engineer will contribute to the development of advanced phased array antenna modules and high-performance communication systems. This role combines system-level digital design involvement of Phase Array Antenna Modules with hands-on digital ASIC/SoC development, including RTL design, verification, subsystem integration, and silicon implementation support.

Have a strong background in digital design and SoC development, along with an interest in working across system, firmware, and physical design domains.
ESSENTIAL DUTIES AND RESPONSIBILITIES

1. Design and implement digital subsystems for phased array and communication system applications
2. Develop high-quality RTL (SystemVerilog)for control and data path logic
3. Participate in system architecture and partitioning, collaborating with RF, firmware, and system teams
4. Integrate processor-based subsystems (e.g., RISC-V)into complex SoC designs
5. Collaborate with firmware teams supporting embedded software development (C)
6. Implement and support interfaces such as:
1. SPI / QSPI
2. High-speed serial interfaces (e.g., JESD204B/C or similar)


7. Support verification activities and contribute to adoption of UVM and/or formal methodologies
8. Work closely with physical design teams to:


1. Analyze and resolve timing issues
2. Support synthesis and place-and-route flows
3. Develop and implement engineering change orders (ECOs)


9. Participate in system bring-up, validation, and debug

Perform any other related duties as required or assigned.

QUALIFICATIONS

RTL design using SystemVerilog (or Verilog)

Simulation, debugging, and verification workflows

Experience with SoC integration including processor subsystems, preferably RISC-V

Familiarity with embedded software interaction, including C programming

Experience with:

Timing analysis and closure

Synthesis and backend design collaboration

ECO generation and implementation

Working knowledge of common hardware interfaces (SPI, QSPI, high-speed serial links)

EDUCATION AND EXPERIENCE
Bachelor's or Master's degree in Electrical Engineering or related field

6 + years of experience in digital ASIC/SoC design

ADDITIONAL SKILLS

Strong problem-solving and debugging skills

Ability to work effectively in cross-functional teams

Clear communication and documentation skills

Interest in both system-level and implementation-level design challenges

PHYSICAL ACTIVITIES
Not indicated.

ENVIRONMENTAL CONDITIONS
There are no harmful environmental conditions that are present for this position.
The noise level in the work environment is not indicated.

ADDITIONAL INFORMATION
The above statements are intended to describe the work being performed by people assigned to this job. They are not intended to be an exhaustive list of all responsibilities, duties and skills required. The duties and responsibilities of this position are subject to change and other duties may be assigned or removed at any time. This position may require exposure to information subject to US Export Control regulations, i.e.: the International Traffic and Arms Regulations (ITAR) or Export Administration Regulations (EAR). All applicants must be US persons within the meaning of US regulations.