Role description

Semiconductor Process Engineer

Associate III - Semiconductor S/W Product Development

This is a Semiconductor Process / Defect Analysis Engineering role focused on wafer defect characterization and failure analysis in an R&D or semiconductor manufacturing environment.

The opportunity:
• Design, collect data, analyze and compile reports on process engineering experiments for defect reduction, within safety guidelines
• Troubleshoot defect problems, perform Root Cause Analysis and resolve moderately difficult process engineering issues
• Implement new technology, products and analytical instrumentation to support the defect study
• Design the failure analysis (FA) DOE for the key defect critical components to troubleshoot the wafer defect issue on the key R&D programs and major customer escalations
• Perform the FA, collect and analyze the data within safety guidelines
• Communicate the FA observation and recommend the solution path in defect troubleshooting
• Measure the wafer defect/film properties, organize data/reports for review in supporting the defectivity improvement by SEM/FIB
• Prepare wafers for experimentation, include cleaning, loading wafers. Prepare klarf files. Evaluate and recommend performance of process system.

This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.

What you need:
• Experience: 1-2 Years
• Main Skills

o SEM/FIB operation

o Failure Analysis (FA)

o Root Cause Analysis (RCA)

o Wafer defect analysis

o Defect metrology

o Semiconductor process troubleshooting

o DOE (Design of Experiments)

o Data analysis & reporting
• Key Knowledge

o Semiconductor wafer fabrication

o Yield improvement & defect reduction

o SEM/EDS/FIB principles

o Cleanroom & wafer handling

o Process engineering and metrology tools
• Education

o Bachelor's or Master's in:
• Electrical Engineering
• Materials Science
• Chemical Engineering
• Physics
• Microelectronics/Nanotechnology

Compensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.

Role Location: California

Compensation Range: $70,000-$105,000

Benefits

Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company's 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.

Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) Retirement Plan with employer matching.

Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.

Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).

All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.

#UST

#LI-MK2