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X In accordance with Washington state law, we are highlighting our comprehensive benefits package, which is available to all eligible US based employees. Benefits for this role include:
- Health, dental, vision, life, disability insurance
- Retirement Benefits: 401(k) with company match
- Paid Time Off: 20 days of vacation per year, accruing at a rate of 6.15 hours per pay period for the first five years of employment
- Sick Time: 40 hours/year (increased to 69 hours/year for Seattle) including 5 discretionary sick days per instance
- Maternity Leave (Short-Term Disability Baby Bonding): 28-30 weeks
- Baby Bonding Leave: 18 weeks
- Holidays: 13 paid days per year
Note: By applying to this position you will have an opportunity to share your preferred working location from the following:
Sunnyvale, CA, USA; Kirkland, WA, USA; New York, NY, USA; Seattle, WA, USA.
Minimum qualifications: - Bachelor's degree or equivalent practical experience.
- 8 years of experience programming in C or Python.
- 5 years of experience testing, and launching software products.
- 5 years of experience with performance, large-scale systems data analysis, visualization tools, or debugging.
- 3 years of experience with software design and architecture.
Preferred qualifications: - Experience with hardware/software co-design problems, especially performance analysis and bottleneck identification at the pre-silicon stage.
- Experience with ML system architectures, including knowledge of compilers, Intermediate Representations (IRs), and hardware accelerators.
- Experience enabling and optimizing large-scale ML models (e.g., LLMs, large embedding models).
- Ability to lead technical strategy for complex systems, influencing both simulation toolchains and hardware roadmaps.
- Proven expertise in constructing custom IR dialects and leveraging open-source compiler frameworks (MLIR, XLA) to solve system level analysis and exploring software-hardware mapping opportunities.
- Expertise in architecting high-confidence, high-velocity system performance modeling and correlation infrastructure.
About the jobOur team is pioneering next-generation performance modeling and simulation technologies that drive multi-year system architecture roadmaps for cutting-edge machine learning accelerators. We are looking for a visionary technical lead to define and own the accuracy and fidelity of our critical co-design simulation platform. Help work on the most complex system-level performance challenges in close collaboration with hardware designers, ML researchers, and product architects, defining the next decade of AI systems at data center scale. If you are excited about building the most powerful ML systems with HW-SW co-design and optimization, please join us and accomplish the missions together.
Responsibilities - Establish and maintain high-confidence correlation infrastructure between simulated performance and physical hardware measurements (silicon).
- Architect and evolve the simulation layer to support deep exploration of complex, business-critical workloads (e.g., large language models, advanced kernels) and future system topologies.
- Identify and solve system-level hardware/software bottlenecks and optimization opportunities at the critical pre-silicon stage.
- Provide high-confidence lower-bound performance estimates for future ML systems and architectures.
US: $207000 - $301000 (USD) 20% bonus target equity benefits
Learn more about benefits at Google .
