Sr Staff - Staff Design Verification Engineer

SA Technologies, Inc.

$140K — $180K *
Telecommunications & Hardware
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • 10+ years of hands-on Design Verification experience.
  • Deep knowledge of SystemVerilog testbench, DPI and UVM.
  • Excellent programming skills with experience in object-oriented design.
  • Experience developing scalable and portable testbenches.
  • Proficient in scripting languages such as Python or Perl.
  • Strong debugging and problem-solving skills.
  • Good interpersonal skills and ability to collaborate effectively.

Responsibilities

  • Work with cross-functional teams to ensure high-quality design for first silicon.
  • Develop and implement detailed verification strategies and coverage plans.
  • Create verification methodologies and reusable environments with essential components.
  • Implement tests and manage regressions while debugging test failures.
  • Analyze and debug complex issues from simulation to silicon phases.
  • Enhance verification infrastructure and flows for better efficiency.
  • Contribute to the evolution of verification methodologies and best practices.

Benefits

  • Participate in a friendly technical assessment to showcase skills.
  • Collaborative team environment that values innovative problem-solving.
Full Job Description
Job Description

Job Description

Key Responsibilities
• Work with architects, designers, post silicon and software engineers to ensure a high-quality design that works first silicon.
• Develop and implement verification strategies, detailed tests and coverage plans based on micro-architecture.
• Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage.
• Implement tests, manage regressions, gather coverage, and debug test failures.
• Collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation.
• Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases.
• Continuously enhances verification infrastructure and flows to improve efficiency and quality.
• Contribute to the evolution of the overall verification methodology and best practices across the organization.

Skills And Qualifications
• Great debugging and problem-solving skills.
• Deep knowledge of SystemVerilog testbench, DPI and UVM.
• Excellent programming skills and knowledge of software engineering practices including object-oriented design.
• Experience developing scalable and portable testbenches and components.
• Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate level simulations.
• Proficient in scripting languages such as Python or Perl.
• Good interpersonal skills and the ability to work as a standout colleague are a must.
• Extremely self-motivated and eager to solve problems
• 10+ years of Design Verification experience.

Desired Skills And Qualifications
• Knowledge of pipelined processor architecture.
• BS or MS in Computer Science or Electrical Engineering.
• 10+ years of hands-on Design Verification experience.

Location: Sunnyvale, CA

Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications


Embark on a rewarding journey together with us! At SA Technologies Inc., your journey begins with a friendly technical assessment, providing a stage to highlight your unique skills.

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