ResponsibilitiesYou will be responsible for
verifying complex digital designs, including Systems-on-Chip (SoCs) with multiple CPUs, digital signal processors, security hardware, interconnects, and peripheral logic supporting IoT and edge-compute applications.
The ideal candidate is a
self-starter who takes full ownership of verification efforts and consistently delivers high-quality, production-ready silicon.
Key responsibilities include:
- Own and execute end-to-end digital verification at block, sub-system, and full-chip (SoC) levels
- Develop detailed verification plans aligned with architecture and design specifications
- Perform SoC-level verification using full-chip simulation and regression environments
- Architect and implement scalable, reusable UVM-based testbenches using SystemVerilog
- Develop comprehensive test scenarios, stimulus, monitors, and checkers to achieve robust functional coverage
- Drive constrained-random and directed testing, including scoreboarding and self-checking mechanisms
- Develop and maintain C/C++ based verification libraries and tests for SoC-level validation
- Automate verification flows for regressions, coverage collection, and results reporting
- Define, track, and close functional and code coverage goals
- Utilize advanced debugging methodologies to isolate and resolve complex design and verification issues
- Perform root-cause analysis and collaborate closely with design teams to drive fixes
- Ensure verification quality meets or exceeds project, schedule, and industry standards
Experience with
edge-based AI inference workloads is a plus.
Requirements- BSEE or MSEE with 8-12 years of hands-on digital design verification experience
- Proven track record of multiple tape-outs with silicon functioning to specification
- Strong experience in block-level, sub-system, and full-chip SoC verification
- Ability to define and manage verification deliverables, milestones, and schedules
- Proactively identify verification risks and implement mitigation strategies
- Experience working with complex SoCs integrating multiple 3rd-party IPs and VIPs
- Strong collaboration skills to work effectively with design, architecture, and software teams
- Excellent communication skills for reporting status, issues, and progress to stakeholders
Technical Skills- Design Verification:
- SystemVerilog, UVM, Verilog
- Functional and code coverage methodologies
- Constrained-random verification and scoreboarding
- SoC & Software-Based Verification:
- C/C++ based verification in SoC environments (required)
- Experience with processor-based systems (ARM and/or RISC-V preferred)
- Architectures & Protocols:
- ARM or RISC-V processor-based SoCs
- AMBA protocols (AXI, AHB, APB)
- DMA, flow control, and standard serial interfaces
- Scripting & Automation:
- Low Power (Digital):
- Experience verifying low-power digital architectures and features is highly desirable
Preferred Experience- Security IPs (Crypto, OTP)
- DSP and compute-heavy digital subsystems
- High-performance or low-power SoC architectures
- Edge AI / ML workload enablement
