Job Title: RTL Design Engineer
Job Location: San Francisco, CA
Job Type: Full-Time / Contract
Work Experience:Minimum 6+ years' experience, FPGA/ASIC RTL Design experience
Skill Sets:Verilog, VHDL, RTL implementation, Linting, CDC, Synthesis/STA, video codec/processing, H.265 " "H.264" "HEVC "
Required: - Contribute to micro-architecture specification for SoC design block
- Participate in SoC Chip Architecture specification reviews
- Interact with SoC integration, verification and physical design teams and also with IP vendors
- Handle complete responsibility of an entire block starting from Micro-architecture specifications, RTL implementation, Linting, CDC, Synthesis/STA
About us:Founded in 2007, InterSources Inc is a Small Business Enterprise (SBE), Minority Business Enterprise (MBE) & Women-Owned Small Business (WOSB) Certified Company specializing in providing IT Consulting, IT Staffing Solutions, and Software solutions. We have been recipients of Various Awards under "Fastest Growing IT Consulting and Software Company " and "Excellence in Technology Services "
