Responsibilities:- Lead development of analog Mixed-signal IC and owns the top level
- Supervise and review block designer work and hold design review
- Work with cross-functional team to architect the chip for DFT
- Closely work and support cross functional team for bench validation, qualification and final test development.
- Develop analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes
- Analyze technology, architecture, circuit design, and parametric design trade-offs to meet aggressive technical performance specifications
- Perform transistor-level design and simulation using industry leading EDA tools
- Lead comprehensive design reviews
- Supervise Analog Circuit Physical Design Layout and edit layouts
- Collaborate with Digital Design Engineers, CAD, Systems Engineering, Test Engineering and Applications teams to ensure DFT, DFM features and achieve rapid silicon bring-up and time to production release
- Work closely with the verification team to define the verification matrix.
- Have the ownership of the top-level schematic and run all the top-level analog simulation.
- Participate in top-level AMS verification.
Qualifications & Requirements : - M.Sc. with minimum 10 years of relevant experience or Ph.D. with 6 years of with relevant experience in Electrical Engineering
- Provel track record of taking at least one analog-mixed signal part to high-volume production.
- Proven track record at each stage of the following:
- Circuit architecture development and technical feasibility studies
- Writing detailed block-level specifications and review documents
- Detailed design and simulation of one or more of the following: Oscillators, ADCs, DACs, temperature sensors, Integer and Fractional-N PLLs, Digital PLLs, low-noise op-amps, regulators, bandgap circuits in CMOS or BiCMOS processes, subthreshold circuits and architecture.
- Proficiency with EDA tools including Cadence Virtuoso, Spectre, ADE, Mixed-mode AMS tools, Layout XL
- Extensive knowledge of layout effects for circuit and layout design. Ability to supervise layout designers
- Extensive experience with post-layout extraction and verifications
- Experience with validation, characterization, qualification, and adherence to production release criteria
- Ability to communicate and work effectively with geographically dispersed teams of mixed-signal, digital, verifications engineers
- Ability to work independently and drive solutions to challenging problems
Desired Characteristics & Attributes:Compensation Range:At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.
The annual base salary range for this role is $148,320.00 - $203,940.00. The final offer is determined by factors such as location, experience, education, and training.
In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals-reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company's future growth and success.
Benefits offered: 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans.
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