About the Role: We are looking for skilled and motivated DSP design engineers to join our team and help us build optical transceivers for next-generation optical modems. The ideal candidate must have a strong theoretical background in digital signal processing, digital communications, and fiber-optic communication systems, with experience developing DSP algorithms for high-speed communication systems. Candidates with industry experience are preferred.
Key Responsibilities- Research, develop, and evaluate digital signal processing (DSP) algorithms for high-speed optical communication systems.
- Design and optimize DSP blocks used in optical transceivers, including adaptive equalization, timing recovery, carrier phase recovery, polarization demultiplexing, and nonlinear compensation.
- Develop system-level simulation models of optical communication links and evaluate DSP algorithm performance under realistic channel conditions.
- Analyze performance under various impairments such as noise, chromatic dispersion, polarization effects, and hardware non-idealities.
- Verify and optimize algorithm performance through floating-point and fixed-point simulations.
- Develop bit-accurate and cycle-accurate models to support ASIC implementation.
- Document design details and collaborate with ASIC, firmware, and verification teams to ensure reliable implementation in silicon.
Preferred Qualifications- Master's or Ph.D. degree in Electrical Engineering, Physics, or Mathematics.
- Minimum of two years of industry experience in related fields.
- Strong background in digital signal processing and digital communications.
- Experience with DSP algorithms for optical communication systems.
- Programming experience in C/C++, Python, MATLAB, or similar languages.
- Experience in modeling communication systems.
- Familiarity with forward error correction (FEC) schemes used in communication systems.
- Experience modeling optical components and electrical frontends of optical transceivers.
- Experience with version control systems, specifically GitHub.
- Familiarity with Verilog or VHDL is a plus.
- Team player with a mindset focused on the successful delivery of the first product.
Salary Range$150,000 - $250,000 Base Annually
The final offer will be determined based on job-related skills, experience, qualifications, and location.