CesiumAstro

FPGA Engineer II

CesiumAstro$113K — $136K *
Aerospace & Defense
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's or Master's degree in Electrical or Computer Engineering.
  • Minimum 2 years of FPGA design and implementation experience.
  • Proficiency in Verilog/VHDL, and tools like Xilinx's Vivado and Modelsim.
  • Hands-on capability with lab instruments (oscilloscopes, spectrum analyzers, etc.).
  • Strong communication skills, both written and verbal.

Responsibilities

  • Develop FPGA circuits and systems through all development phases.
  • Design and verify HDL for high-speed serial interfaces and digital processing cores.
  • Perform testing, validation, and verification of FPGA designs.
  • Manage multiple clock domains and interfaces in design processes.
  • Collaborate with team members in a fast-paced, startup environment.

Benefits

  • Company stock options included in compensation package.
  • Comprehensive health, dental, and vision insurance.
  • Health Savings Account (HSA) and Flexible Spending Account (FSA).
  • Life and disability insurance coverage.
  • Retirement plan available.
Full Job Description
We are looking to add an FPGA Engineer II to our team. If you enjoy working in a startup environment, and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.

In this position, you will contribute to the development of FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board-level hardware design is also desirable.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

  • Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
  • Minimum of 2 years of industry experience in the design, analysis, and implementation of FPGA systems at the HDL level.
  • Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx's Vivado, Modelsim, etc.).
  • Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
  • Excellent written and verbal communication skills.


PREFERRED EXPERIENCE

  • Aerospace design and qualification.
  • Worst-case analysis, failure method and criticality analyses, and reliability analysis.
  • Experience with board-level hardware design.
  • Familiarity with communications systems, such as digital signal processing.


$113,000 - $136,000 a year

CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate's work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.

About CesiumAstro

CesiumAstro is a technology company that provides advanced communications systems for satellite and space-based applications. The company's systems use advanced software-defined radio technology to provide high-bandwidth, low-latency communications for a variety of applications, including remote sensing, earth observation, and satellite communications. CesiumAstro's systems are designed to be highly modular and scalable, allowing them to be easily integrated into a wide range of satellite and space-based platforms. The company was founded in 2017 and is based in Austin, Texas.
Learn more about CesiumAstro
Size
100 employees
Industry
Net Income
-$1 million
Founded
2017
5 Year Trend
+80%
Revenue
$5 million

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