About the Role

We are looking for an FPGA Engineer to design and implement low-latency control and signal processing for our quantum computers. Operations on the quantum computer are implemented using RF pulses that require sub-nanosecond synchronization across dozens of channels. The overall execution speed of the quantum computer relies on low-latency waveform generation and adaptive execution based on real-time measurement information, on microsecond timescales.

You'll design, implement, and verify features across the control stack, from RTL through hardware-in-the-loop validation, starting as co-owner and growing into full subsystem ownership as you build context. As the system scales, you'll take prototype designs and make them production-ready: optimizing RTL and PS firmware for latency, resource use, and timing closure. You'll be working directly with physicists, software engineers, and the rest of the team to turn system requirements into working FPGA design.

Experience with digital logic design or verification for FPGAs or ASICs is essential. Experience with high-throughput design across multiple clock domains is preferred, as is familiarity with Xilinx/AMD RFSoC platforms. No knowledge of quantum physics is required, though we're happy to teach you.

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Compensation consists of a base salary and equity. The salary range for this role is $150-235k, commensurate with experience. We also provide comprehensive benefits, including fully paid medical, dental, and vision insurance for our employees and highly subsidized benefits for spouses and dependents, a 401k and FSA.

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