Wipro

DV Engineer - AI

Wipro$60K — $135K *
Telecommunications & Hardware
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • 5-8 years of experience in VLSI HVL Verification
  • Strong understanding of AI-based HW IP and SoC development
  • Proficiency in SV and UVM methodologies
  • Familiarity with AMBA protocols
  • Baseline understanding of design verification and coverage metrics

Responsibilities

  • Develop test plans based on functional and architectural design specs
  • Build UVM/System Verilog-based verification environments
  • Create directed and random test cases, conducting coverage analysis
  • Debug simulation failures and collaborate with RTL designers
  • Execute regression runs and analyze results for continuous improvement
  • Integrate power-aware simulations and perform low power checks
  • Document test environments, test plans, and results for reviews

Benefits

  • Full range of medical and dental benefits
  • Disability insurance
  • Paid time off, including sick leave
  • Various paid and unpaid leave options
Full Job Description
Job Title: DV Engineer - AI

City: Austin

State/Province: Texas

Posting Start Date: 7/21/26

Job Description:

Job Description

We need a DV engineer for AMD who has AI experience.

The ideal candidate for our AI-based HW IP / SoC development SPW would:

Have a good understanding of AI-based HW IP / SoC development.

Be on the forefront of general AI trends (e.g., understanding of various LLMs and their relative strengths/weaknesses based on application).

Have a baseline understanding of DV, including key measurements (e.g., coverage metrics).

Key Responsibilities:

Strong understanding of SV and UVM and good debugging skills.

Understanding of AMBA protocols.

Understand design specs and develop test plans based on functional and architectural requirements

Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing

Develop directed and random testcases, perform coverage analysis, and close functional/code coverage

Debug simulation failures and work closely with RTL designers to resolve issues

Execute regression runs, analyze results, and contribute to continuous improvements

Integrate and run power-aware simulations, low power checks, and work with UPF/CPF as needed

Collaborate with DFT/PD/RTL teams and post-silicon validation to ensure design quality across domains

Document test environments, testplans, and results for internal and external reviews

Mandatory Skills: VLSI HVL Verification.

Experience: 5-8 Years.

The expected compensation for this role ranges from $60,000 to $135,000 .

Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.

Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law.

About Wipro

Wipro Limited is an Indian multinational corporation that provides information technology, consulting and business process services. The company was founded in 1945 and is headquartered in Bengaluru, India. Wipro has operations in over 50 countries and employs over 191,000 people. The company's primary business is in the information technology sector, and it provides services such as application development and maintenance, digital strategy consulting, and data analytics.
Learn more about Wipro
Size
240,000 employees
Market Cap
$25.9 billion
Industry
Net Income
$101.4 billion
Founded
1945
5 Year Trend
+7.5%
Revenue
$614 billion
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