Company:Qualcomm Canada ULC
Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:Join our Display Processing Unit (DPU) Silicon System Debug team to solve complex, high-impact display issues across leading Qualcomm platforms-working at the intersection of silicon, systems, and software to deliver reliable customer products.
You will:
- Working in a team in identifying and isolation of display issues at silicon level reported by either customer or by internal development team.
- Capable of applying industry standard hardware/software debugging engineering practices (including, but not confined to, in silicon hardware tracing, software logging, signal capture using Oscilloscope and protocol analyzer as well as logic analyzer).
- Develop silicon debug procedures and process in silicon level display debugging. Work shall include development of debug data collection tools, debug data parsing tools and debug data analyzer tools.
- Collaborate with cross-functional teams within Qualcomm from display hardware, display software, SOC infrastructure hardware/software as well as SoC and system performance/power teams to resolve complex system level issues that can result in display mal-function.
- Define and document both internal facing and customer facing for display system debugging process.
- Write technical documentation and provide technical expertise for design, verification and customer engineering to ensure the quality and stability as well as the robustness of Qualcomm display solution.
- Mentor and guide junior design engineers on the team.
- Provide guidance and training for Qualcomm global customer engineering teams related to all display related
Preferred Qualifications:- Strong analytical skills and attention to detail, with the ability to triage and debug complex technical issues
- Strong written and verbal communication skills, including the ability to document findings and align cross-functional stakeholders
- Proficiency in C/C++ and Python for tool development, automation, and data analysis
- SOC System-level debugging experience (typical ranges: 5+ years). Display subsystem experience is a plus.
- Familiarity with display interface standards such as DisplayPort, DSC, MIPI, HDMI.
- Comfortable making technical and business presentations to a wide range of audiences, including to senior management.
- Ability to independently drive activities/project with internal and external cross-functional teams
- Ability to deliver to work in fast-paced environment with multiple engagements in parallel
- Master's or PhD degree in Computer Engineering or Computer Science with foundation in SOC design and verification methodology.
Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
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