Director, ASIC Design

Credo, Inc

$210K — $240K *
Consumer Technology
11 - 15 years of experience
Job Overview by Ladders

Qualifications

  • MS in Electrical Engineering or Computer Science, 15+ years in ASIC design.
  • Deep understanding of digital logic design and complex communication interfaces.
  • Proficient in Verilog/SystemVerilog RTL design.
  • Knowledgeable in synthesis and static timing analysis.
  • Experience with UVM for developing testbenches and test cases.
  • Hands-on chip bring-up and validation experience.
  • Track record of successful production tape-outs.
  • Familiar with DFT methodology and physical design flow.
  • Expertise in STA and timing closure.
  • Strong planning, estimation, and communication skills.
  • Proven leadership and mentoring abilities.

Responsibilities

  • Lead chip development from design to production for high-quality ASICs.
  • Manage design and verification teams focused on high-speed ASICs.
  • Develop and maintain project schedules to ensure timely deliveries.
  • Provide technical guidance across all ASIC development phases.
  • Collaborate with cross-functional teams for successful chip tape-out and bring-up.

Benefits

  • Full range of medical benefits.
  • Discretionary bonus eligibility.
  • Equity opportunities.
  • Inclusive work environment.
Full Job Description
Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers.

Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure.

At Credo, you'll be part of a team of world-class technologists and engineers that thrive on pushing the limits of what's possible for some of the world's most important companies. Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance, energy efficiency, and scalability.

We foster a culture of technical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale.

Join us and help us architect the next generation of disruptive networking technologies - because at Credo, We Connect.

About the Role

As a Director, ASIC Design you will lead the development of advanced ASIC solutions for next-generation data communication products. In this role, you will be responsible for driving chip development from concept to production, managing high-performing teams, and ensuring successful execution of complex ASIC projects. You will provide technical leadership, collaborate across functions, and deliver high-quality silicon that meets stringent performance and reliability standards.

You will work on all aspects of front-end ASIC design, including project definition, micro-architecture specification, and design and verification of complex logic blocks. Additionally, you will partner with PD, DFT, STA, and PV teams to ensure successful tape-outs and work closely with system teams for chip bring-up.

Responsibilities
  • Lead chip development: Oversee design, verification, validation, and physical implementation of complex ASIC projects to ensure bug-free, high-quality silicon.
  • Manage design & verification teams for large, high-speed ASICs.
  • Project planning & execution: Develop and maintain project schedules, ensuring timely delivery.
  • Provide technical leadership through all phases of ASIC development: architecture, micro-architecture, RTL design, verification, timing closure, and physical design.
  • Collaborate with PD, DFT, STA, PV, and system teams for successful tape-outs and chip bring-up.


Basic Qualifications
  • MS degree in Electrical Engineering or Computer Science with 15+ years of relevant experience in ASIC design.
  • Deep understanding of digital logic design and complex synchronous/asynchronous interfaces.
  • Proficiency in Verilog/SystemVerilog RTL design.
  • Knowledge of synthesis and static timing analysis.
  • Experience developing testbenches and test cases; familiarity with UVM.
  • Hands-on experience with chip bring-up and validation.
  • Proven track record of successful production tape-outs.
  • Familiarity with DFT methodology and physical design flow.
  • Hands-on experience with STA and timing closure.
  • Strong planning, estimation, and communication skills.
  • Ability to lead and mentor teams effectively.


Preferred Qualifications
  • Expertise in scripting languages (Python, Tcl, Perl, Shell).
  • Knowledge of EDA tools (Synopsys, Cadence, Mentor).
  • Experience with high-speed interfaces or SerDes.


The base salary range for this position is $210,000 - $240,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.

Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.

If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email [email protected].

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