Director, Analog/Mixed-Signal Design

Ayar Labs

$240K — $300K *
Telecommunications & Hardware
11 - 15 years of experience
Job Overview by Ladders

Qualifications

  • B.S. in Electrical Engineering
  • 12+ years of industry experience in analog/mixed signal design
  • Track record of production tapeouts in advanced FinFET CMOS nodes
  • Demonstrated ability to deliver complex analog/mixed-signal IP across multiple concurrent programs
  • M.S. or Ph.D in Electrical Engineering (preferred)

Responsibilities

  • Drive architectural decisions for high-speed optical PHY
  • Lead co-design efforts across the EIC/PIC boundary
  • Implement silicon-success methodology and expectations
  • Mentor AMS design engineers in reviews and debug
  • Represent AMS in cross-functional architecture reviews
  • Manage and scale design team for multiple parallel products

Benefits

  • On-site work environment in San Jose, CA
  • Leadership role with strategic impact
  • Opportunity to shape next-generation optical I/O products
  • Mentoring opportunities for engineers
  • Involvement in cross-functional and external technical engagements
Full Job Description
Director, Analog/Mixed Signal Design

Location: San Jose, CA (on-site)

We are hiring a Director of Analog/Mixed Signal Design to lead the team responsible for the advanced circuits at the heart of our optical I/O products. You will own the analog/mixed-signal design strategy and execution for high-bandwidth optical links, including high-speed transmit and receive signal paths, clocking, data conversion, biasing, and power-management circuits. You will set clear technical direction, maintain a rigorous design methodology, and remove execution barriers, ensuring that the team delivers production-quality silicon on schedule.

Key Responsibilities
  • Drive architectural decisions for the high-speed optical PHY of our next-generation product: TX path, RX path, clocking, and mixed-signal control loops against a system-level link budget shared with the photonics and laser teams.
  • Drive co-design efforts across the EIC/PIC boundary.
  • Lead the silicon-success methodology: first-silicon-success expectations, debug discipline, characterization-to-production.
  • Mentor AMS design engineers in design reviews and silicon debug.
  • Represent the AMS organization in cross-functional architecture reviews, customer technical engagements, and foundry/EDA partner discussions.
  • Manage and scale the design team to develop IP intercepting multiple parallel products.


Basic Qualifications
  • B.S. in Electrical Engineering
  • 12+ years of industry experience in analog/mixed signal design
  • Track record of production tapeouts in advanced FinFET CMOS nodes
  • Demonstrated ability to deliver complex analog/mixed-signal IP across multiple concurrent programs.


Preferred Qualifications
  • M.S. or Ph.D in Electrical Engineering


Annual Salary Range: $240,000 - $300,000

NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don't send candidates to Ayar Labs, and do not contact our managers.

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