Job DescriptionIn this role, you will drive the development and productization of next-generation NAND Interface Mux/Buffer technologies that enable high-performance, reliable, enterprise-class storage solutions.
You will take end-to-end technical ownership across architecture definition, implementation, debug, and customer deployment, supporting both internal enterprise SSD programs and component business customers.
Essential Duties and Responsibilities: - Leading the architecture, design, and productization of NAND IF Mux/Buffer solutions from concept through production.
- Creating and maintaining high-quality design and architecture documentation to support scalable and robust implementations.
- Performing RTL simulation, debug, and analysis, and driving resolution of complex functional and performance issues.
- Owning end-to-end problem solving and root-cause analysis across RTL, firmware (FW), silicon, and system integration.
- Driving FW bring-up and FW-assisted debug, including HW-FW interaction, handshakes, and system flows.
- Supporting post-silicon bring-up and lab debug, working across silicon, FW, validation, and system teams.
- Collaborating closely with design partners to define and implement optimal architectural and implementation solutions.
- Working directly with component business units and customers to debug issues, ensure smooth integration, and enable successful deployment of SanDisk solutions.
- Leveraging automation, scripting, and AI-assisted tools to improve debug efficiency, analysis quality, and overall engineering productivity.
- Acting as a technical leader, influencing architecture and design decisions across teams without direct authority.
This role emphasizes technical excellence, strong ownership, cross-layer thinking, and customer empathy to deliver reliable, enterprise-grade solutions.
QualificationsRequired: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
- Strong experience in digital and system-level architecture and design, preferably with NAND interfaces, Mux/Buffer designs, or related ASIC/IP blocks.
- Proven expertise in RTL development, simulation, and debug (Verilog / SystemVerilog), including waveform-based analysis.
- Demonstrated ability to drive systematic problem solving and root-cause analysis across RTL, FW, silicon, and system boundaries.
- Hands-on experience with firmware (FW) bring-up and debug, including:
- HW-FW interaction and control flows
- FW-driven sequences and failure analysis
- Experience with post-silicon bring-up and lab debug, including cross-functional debug with validation and FW teams.
- Proficiency in Python and scripting (e.g., Python, Bash, Tcl) for automation, data analysis, debug flows, and productivity improvement.
- Experience utilizing AI-assisted engineering tools to accelerate debug, analysis, automation, and documentation, with sound engineering judgment.
- Strong understanding of HW-FW-system interactions, with the ability to debug complex issues spanning multiple layers.
- Ability to collaborate effectively with design partners, internal cross-functional teams, and external customers.
- Demonstrated ability to lead technical direction and influence decisions without formal people management responsibility.
- Strong written and verbal communication skills, including the ability to produce clear, concise technical documentation and customer-facing explanations.
Compensation & Benefits Details- An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
- The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
- You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards.
- We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
- Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law.
