Sr. Staff ASIC Design Engineer

Tensordyne

$160K — $190K *
Enterprise Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • 10+ years of ASIC design experience with a strong RTL logic design background in multi-million gate ASICs using Verilog or System Verilog.
  • Experience in integrating CPU IP into SoC and a deep understanding of ARM/RISC-V/MIPS architectures.
  • Knowledgeable in memory hierarchy, cache coherency, virtual memory, and multicore CPU operations.
  • Familiar with ABMA/APB/AXI protocols and various processor peripheral interfaces like SPI, eMMC.
  • Proficient in ASIC development processes with hands-on experience in front-end tools and methodologies.
  • Experience with low power design techniques and UPF flow for power intent definition.
  • Interest in exploring AI architectures related to convolution and transformer workloads.

Responsibilities

  • Author micro-architecture specifications and participate in reviews to ensure clarity and feasibility.
  • Architect and implement complex RTL designs for high-performance AI ASICs.
  • Scope third-party IP requirements and engage with vendors for potential integration.
  • Integrate CPUs and relevant IPs into the CPU sub-system for enhanced functionality.
  • Collaborate with the physical design team to resolve implementation challenges and optimize power utilization.
  • Analyze code coverage metrics and provide feedback to the verification team for improved coverage closure.
  • Conduct diagnostic tests and post-silicon validation, assisting with software deployment in the lab.

Benefits

  • Ground floor opportunity to influence a new company with potentially significant impact in the tech industry.
  • Access to learning and development opportunities from a diverse team of experts in AI and engineering.
  • Comprehensive benefits package including medical, vision, and dental coverage.
  • Perks like meals, snacks, drinks to maintain a vibrant workplace culture.
  • Work alongside motivated co-workers in a dynamic and enjoyable office environment.
  • Flexible working hours and an unlimited PTO policy to promote work-life balance.
Full Job Description
About the role:

As a Sr. member of Tensordyne's ASIC team, you will be responsible for the microarchitecture and design implementation of high-performance AI ASICs. These ASICs closely couple novel computational accelerator units, compute, interconnects, networking and 3rd-party IP blocks as needed to redefine the next generation of tokenomics for inference.

Responsibilities:

  • Author micro-architecture specifications and participate in specification and test plan reviews.
  • Architect and implement complex RTL designs.
  • Scope third party IP requirements and solicit vendors.
  • Integrate CPU and other relevant IPs into the CPU sub-system.
  • Collaborate with the physical design team to resolve implementation and timing issues and to optimize power.
  • Analyze code coverage and provide feedback to the verification team to achieve coverage closure.
  • Perform diagnostic and post-silicon validation tests, as well as assist with software bring-up in the lab.

Required Qualifications:
  • 10+ years of ASIC design experience with a demonstrable track record of RTL logic design in multi-million gate ASICs with Verilog or System Verilog.
  • Experience in IP integration, specifically CPU IP into SoC.
  • Knowledge of ARM/RISC-V/MIPS Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation
  • Familiarity with AMBA/APB/AXI Protocol
  • Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C ....
  • Hands-on experience in all aspects of the ASIC development process with proficiency in front-end tools and methodologies.
  • Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains
  • Previous experience with timing closure at high frequencies is a plus.
  • Interest to explore AI architectures for convolution, transformer and other kinds of workloads
  • Self-starter and highly-motivated to work in a dynamic start-up environment.
  • B.S. (M.S. preferred) degree in Electrical or Computer engineering.


Reasons to consider joining Tensordyne:

  • Ground floor opportunity with the team; be part of shaping one of the most exciting new companies.
  • Learning and development opportunities from a highly diverse and talented peer group, including experts in a wide range of fields, from Artificial Intelligence to Systems & Device Engineering.
  • Competitive benefits package including Medical, Vision, Dental
  • Perks including meals, snacks, drinks and us!
  • Sharp, motivated co-workers in a fun office environment
  • Flexible work hours & unlimited PTO policy

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