Job Title: Sr. Packaging Engineer
Posting Start Date: 6/22/26
Job Location(s): Irvine
Requisition ID: 77803
Job Description:
DescriptionIn this role, candidate will manage and execute IC Packaging Process development, working with internal design, manufacturing & reliability teams and external material & equipment suppliers.
Location is Irvine, CA.
Responsibilities- Candidate will be responsible for creation of project plans including timeline, cost, risk assessments and mitigation plan.
- Candidate will execute NTI release to production through characterization, DOE, reliability testing, qualification, & high volume validation.
- Typical projects focus on process development, design rule improvement, material development, drive cost reduction opportunities and solving RMA / quality issues.
- Candidate will rely upon program management skills to keep multiple activities with scope and schedule of the overall program objectives.
- Domestic and international travel may be needed.
Required Experience and Skills- Minimum a Bachelor's Degree qualification in Material Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering and other related specialization.
- Position requires minimum 5 years job experience.
- Relevant technical experience in semiconductor packaging technology.
- Technical expertise required in failure analysis, material interaction, and yield improvement.
- Good understanding of SPC, FMEAs, Six Sigma, and Reliability Standards.
- Candidate is expected to possess excellent communication skills, verbal, written, and presentation.
- Good problem solving skill.
- Self-motivated individual who is assertive and results/goal oriented.
- Team player with good interpersonal skills and able to work efficiently with multi-functional and multi-cultural groups.
Desired Experience and Skills- R&D experience in advanced SiP packaging development.
- Hands-on experience in packaging design rule define and process & material development: SMT, Flip Chip, Mold, & Singulation.
- Knowledge of Flip Chip Bumping, WLCSP, Fan Out, Stack integration, Dual Side BGA/MGA.
- Experience in Cadence Allegro and AutoCAD design tool.
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The typical base pay range for this role across the U.S. is currently USD $91,200 - $177,200 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance.
