Palo Alto Networks

Sr Manager, Hardware Engineering (NetSec)

Palo Alto Networks$192K — $312K *
Telecommunications & Hardware
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in Electrical Engineering or Computer Engineering preferred.
  • 10+ years of system-level hardware design experience.
  • 5+ years of people management experience preferred.
  • Proven success in leading hardware engineering teams and delivering complex design solutions.
  • Strong understanding of the overall product development process and product validation testing.
  • Experience with AI/ML-driven EDA features for optimizing efficiency and quality.
  • Proficient in EDA software and knowledgeable about DFM and DFT principles.

Responsibilities

  • Lead and mentor a team of board design and signal integrity engineers.
  • Instill a quality-focused mindset in the design process.
  • Evaluate and integrate AI-based tools into the hardware development lifecycle.
  • Establish and enforce procedures for high-quality board design methodologies.
  • Drive early identification of hardware risks during architectural definition.
  • Oversee the entire hardware design lifecycle from concept to production.
  • Collaborate with cross-functional teams to ensure product success.

Benefits

  • Employee discounts and perks.
  • Professional development and training opportunities.
  • Health, dental, and vision insurance.
  • Flexible work schedule and remote work options.
  • Retirement savings plan with company match.
Full Job Description
Job Summary

The Hardware Engineering Manager will be responsible for overseeing a hardware design team-specifically Board Design and Signal Integrity (SI) Engineers-ensuring the successful execution of projects from early concept through production. This role requires strong leadership, technical expertise, and a commitment to instilling a quality-focused mindset across the organization. The successful candidate will prioritize the creation and following of rigorous procedures and the implementation of AI-based tools to achieve the highest possible quality and efficiency as early as possible in the development cycle.
Responsibilities
  • Lead, mentor, and manage a team of board design and signal integrity engineers, fostering a culture of technical excellence and quality-first thinking.
  • Instill a quality-focused mindset within the team, emphasizing that quality is a shared responsibility integrated into every stage of the design process.
  • Evaluate, pilot, and integrate AI-based tools and machine learning techniques into the hardware development lifecycle to accelerate design cycles, automate routine tasks, and enhance quality.
  • Establish, document, and enforce procedures and best practices for board design and SI methodologies to ensure repeatable, high-quality outcomes.
  • Drive "Shift Left" initiatives to identify and mitigate hardware and signal integrity risks during the earliest phases of architectural definition and simulation.
  • Oversee the entire hardware design lifecycle, from concept generation to detailed PCB design, simulation, prototyping, testing, production release, and sustaining.
  • Collaborate with other disciplines within the Hardware Design team including: PCB layout, Mechanical Design, Power Design, and Validation Test
  • Collaborate with cross-functional teams including ASIC/FPGA, software, operations, and product management to ensure seamless integration and product success.
  • Review and approve hardware designs, ensuring they meet strict technical specifications, quality standards, cost targets, and project timelines.
  • Create and maintain project schedules, resources, and budgets for hardware design activities.
  • Identify and implement new technologies and EDA tools to enhance design capabilities and efficiency.
  • Conduct weekly one-on-ones with direct reports, as well as mid-year and year-end performance reviews.
  • Review career development opportunities as well as individual resource loading across multiple programs.
  • Maintain a strong understanding of SI requirements, high-speed interface solutions, testing, and validation.
  • Participate in design reviews and provide technical guidance and hardware problem-solving expertise.
  • Participate in providing early-on guidance to Ops Supply Chain Management
  • Influence overall team collaboration.


Qualifications
  • Bachelor's degree in Electrical Engineering or Computer Engineering preferred.
  • Minimum of 10 plus years of experience in system-level hardware design.
  • Minimum 5 plus years of experience of people management skills preferred.
  • Proven track record of successfully leading hardware engineering teams and delivering high-quality, complex design solutions.
  • Strong understanding of the overall product development process.
  • Demonstrated success in process-driven engineering and a history of implementing quality-improvement procedures.
  • Solid understanding of product validation testing.
  • Proven ability to identify and leverage emerging AI/ML-driven EDA features or automation scripts to optimize engineering efficiency and quality.
  • Strong proficiency in EDA software.
  • Expertise in DFM (Design for Manufacturing) and DFT (Design for Test) principles.
  • Strong understanding of product manufacturing processes (e.g., PCB fabrication, SMT assembly, and high-speed material limitations).
  • Strong understanding of estimated PCBA and component costs.
  • Excellent leadership, communication, and interpersonal skills; ability to scale the team and foster a collaborative, inclusive environment.
  • Ability to manage multiple projects simultaneously and prioritize tasks and resources effectively.
  • Problem-solving mindset with a strong attention to resolution and root-cause analysis.
  • Excellent understanding of the entire high-speed development process (e.g., feasibility, SI simulations, and system-level validation).
Desired Skills
  • Experience in the networking or data center development space.
  • Familiarity with PLM (Product Lifecycle Management) systems and document control.
  • Strong experience with rapid prototyping and lab characterization techniques.


Compensation Disclosure

The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/com-missioned roles) is expected to be the annual range listed below. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found here.

$192,900.00 - $312,025.00/yr

About Palo Alto Networks

Palo Alto Networks, Inc. is an American multinational cybersecurity company with headquarters in Santa Clara, California. Its core products are a platform that includes advanced firewalls and cloud-based offerings that extend those firewalls to cover other aspects of security. The company serves over 70,000 organizations in over 150 countries, including 85 of the Fortune 100. It is home to the Unit 42 threat research team and hosts the Ignite cybersecurity conference.
Learn more about Palo Alto Networks
Size
11,870 employees
Market Cap
$42.6 billion
Industry
Net Income
-$368.2 million
Founded
2005
5 Year Trend
+25.7%
Revenue
$3.7 billion
NASDAQ

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