SENIOR FPGA ENGINEER IIRocket Lab's Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.
As a Sr. FPGA Engineer II based at our Optical Systems sites in Chantilly, VA, you will have the opportunity to support Tranche 3 of the U.S. Space Development Agency's (SDA) Proliferated Warfighter Space Architecture (PWSA) using the latest FPGA technologies including Xilinx to support advanced Electro-Optical (EO/IR) technology.
WHAT YOU'LL GET TO DO- Work with the hardware design team on requirements.
- Complete FPGA logic design, coding, simulation, and testing.
- Support hardware and software development teams in bring-up and test of products.
- Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
- Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
- Execute debugging of the design in the lab.
- Perform synthesis, implementation, and timing analysis.
YOU'LL BRING THESE QUALIFICATIONS AS FIRMWARE ENGINEER II:- Bachelor's degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
- Experience in FPGA firmware design with VHDL.
- Ability to obtain and maintain an U.S. Government Security Clearance
THESE QUALIFICATIONS WOULD BE NICE TO HAVE: - Experience with Xilinx/AMD Versal architecture
- Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
- Experience in FPGA- or ASIC-based image processing algorithms.
- Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
- Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
- Experience with software interfaces including interrupts and DMA.
- Experience with DDR4, Aurora, and high-speed transceiver design and verification.
- Familiarity with AXI Stream and AXI Memory Mapped interfaces.
- PCB design and schematic capture and layout with tools such as Altium Designer.
- Active TS/SCI security clearance.
ADDITIONAL REQUIREMENTS: - Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus.
- Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing.
- Must be physically able to commute to buildings
- Occasional exposure to dust, fumes and moderate levels of noise.
