NXP Semiconductors

Sr Digital Design Engineer

NXP Semiconductors • $130K — $155K *
Chandler, AZ 85225In-Person
Manufacturing & Automotive
8 - 10 years of experience
Today
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Job Overview by Ladders

Qualifications

  • M.S. in Electrical Engineering, Computer Engineering, or related field required.
  • Minimum 10 years of experience in digital IC design and development with leadership roles.
  • Strong grasp of digital design principles such as finite state machines and low-power techniques.
  • Expertise in RTL design using Verilog/SystemVerilog for complex ICs.
  • Familiarity with synthesis, timing analysis, and physical implementation workflows.
  • Proficient in modern verification methodologies including UVM and coverage-driven verification.
  • Experience in developing controllers for PMICs, automotive electronics, or industrial applications.

Responsibilities

  • Review product requirements and architecture specifications for PMIC applications.
  • Define digital architectures for mixed-signal PMICs, aligning with system requirements.
  • Lead digital design activities from architecture through to production release.
  • Design digital control and monitoring functions for PMIC products.
  • Develop and review RTL and design specifications using Verilog/SystemVerilog.
  • Drive verification strategy and ensure achievement of quality standards.
  • Deliver complete IP solutions with documentation and traceability.

Benefits

  • Collaborative work environment promoting cross-functional teamwork.
  • Opportunities for mentorship, professional growth, and continuous improvement.
  • Involvement in innovative automotive and industrial applications.
Full Job Description
Job Title: Senior Digital Design Engineer

Primary Location: Chandler, Arizona, USA

Role Summary:
  • Lead digital architecture, design, verification, and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications.
  • Drive product execution from concept through RTL development, integration, silicon validation, qualification, and production release.
  • Collaborate across analog, verification, validation, subsystem, SoC, applications, systems, product definition, and customer-facing teams to deliver high-quality mixed-signal solutions.


Job Responsibility:
  • Review product requirements, IP architecture specifications, programming models, microarchitecture, interfaces, and implementation plans for automotive and industrial PMIC applications.
  • Define and implement digital architectures for mixed-signal PMICs, ensuring alignment with system, performance, quality, reliability, safety, power, and area requirements.
  • Lead digital design activities from architecture definition through RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up, and production release.
  • Design and develop digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing, and fault management functions for PMIC and power conversion products.
  • Develop and review RTL, microarchitecture, and design specifications using Verilog/SystemVerilog and industry-standard design and quality checking tools.
  • Drive verification strategy and execution, including test planning, simulation, formal verification, coverage analysis, regression management, and achievement of NXP quality and maturity standards.
  • Deliver complete IP solutions, including RTL, verification collateral, supporting documentation, and requirements traceability from specification through implementation.
  • Track development metrics including milestones, code and functional coverage, defect resolution, and compliance with design requirements.
  • Support silicon debug, characterization, qualification, reliability validation, and production ramp activities.
  • Mentor junior engineers and drive continuous improvement in design methodologies, automation flows, and engineering best practices.


Job Qualification:
  • M.S. in Electrical Engineering, Computer Engineering, or a related field required.
  • Minimum 10 years of experience in digital IC design and development, including technical leadership and architecture responsibilities.
  • Strong understanding of digital design fundamentals, finite state machines, clock-domain crossing, reset architecture, and low-power design techniques.
  • Expertise in RTL design using Verilog/SystemVerilog for complex digital and mixed-signal ICs.
  • Experience with synthesis, static timing analysis, equivalence checking, DFT, and physical implementation flows.
  • Strong knowledge of modern verification methodologies, including UVM, assertions, formal verification, and coverage-driven verification.
  • Experience developing digital controllers for PMICs, power management systems, automotive electronics, or industrial applications is highly desirable.
  • Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA.
  • Strong analytical and problem-solving skills with the ability to develop innovative solutions for complex technical challenges.
  • Excellent written and verbal communication skills with proven ability to lead cross-functional teams in a fast-paced product development environment.

About NXP Semiconductors

NXP Semiconductors N.V. is a Dutch semiconductor manufacturer with headquarters in Eindhoven, Netherlands. The company employs approximately 31,000 people in more than 35 countries, including 11,200 engineers in 33 countries. NXP reported revenue of $8.88 billion in 2020. The company's products are used in a wide range of automotive, identification, wireless infrastructure, lighting, industrial, mobile, consumer and computing applications. NXP is the co-inventor of near field communication (NFC) technology along with Sony and supplies NFC chip sets that enable mobile payments, as well as secure access to cars and buildings.
Learn more about NXP Semiconductors
Size
31,000 employees
Market Cap
$39.8 billion
Industry
Manufacturing & Automotive
Net Income
$52 million
Founded
1953
5 Year Trend
+3.1%
Revenue
$8.6 billion
NASDAQ
NXPI
* Ladders Estimates

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