We are a leader in memory computing with solutions in AI memory computations to reduce power needed in advanced AI systems. We are looking to grow our team with an SOC / RTL Design Engineer that will lead RTL design, simulation and verification for the ASIC / SOC team. This person will also have experience working with memory with GPU and CPU and have knowledge of aspects like Verilog, UVM, APB protocols and ARM architectures as well as implementations for a successful tapeout. This is an exciting time to join a company leading in the AI segment focused on power reduction in a power intensive world.
Benefits- Medical
- Dental
- Vision
- PTO
- 401k
- Performance based bonus
