Overview

Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the digital signal processing and physical layer implementation for theTerawavenext generationmodem. In this role, you will architect, design, implement, and verify FPGA-based modem and physical layer solutions that enable robust, high-reliability communications for our spacecraft and ground systems.

Using latest generation hardware and modern design methodologies, you will work across the full development lifecyclefrom architecture and algorithm mapping through implementation, verification, and hardware bring-upcollaborating closely with systems, DSP/communications, RF, and avionics engineering teams.

Responsibilities

• Architect and design FPGA implementations of modem and physical layer functions on a SoC FPGA platform.

• Translate communications system and DSP algorithm requirements into efficient, resource-optimized RTL (VHDL/Verilog/SystemVerilog).

• Develop and execute comprehensive verification strategies, including self-checking testbenches, constrained-random verification, and coverage-driven methodologies (e.g., UVM).

• Perform timing closure, resource optimization, and design implementation for high-performance FPGA and system-on-chip (SoC) platforms.

• Support integration and hardware bring-up, including lab testing, debug, and validation against system-level performance requirements.

• Collaborate with DSP/communications engineers to co-design and optimize physical layer algorithms for fixed-point FPGA implementation.

• Contribute to design reviews, documentation, and design-for-test/design-for-reliability practices consistent with aerospace-grade development.

• Support radiation-tolerant and high-reliability design considerations for space-based applications.

Minimum Qualifications

• Bachelor's degree or above inElectricalEngineering, ComputerEngineering, or equivalent.

• 7+ years of experience in FPGA design and verification.

• Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog.

• Experience implementing DSP or communications/modem functions in FPGAs (e.g., modulation/demodulation, FEC, filtering, digitalfront-ends).

• Proficiency with FPGA development toolchains (e.g., Xilinx/AMDorIntel/Altera) and simulation tools.

• Experience with verification methodologies including self-checking testbenches and functional coverage.

• Strong understanding of timing analysis, constraints, and timing closure.

Preferred Qualifications

• Background in digital communications theory and physical layer design (synchronization, equalization, carrier/timing recovery, link budgets).

• Experience with system-on-chip (SoC) platforms integrating FPGA fabric and embedded processors.

• Experience in embedded development in C/C++, or experience writing low level drivers.

• Experience developing test venue software and hardware infrastructure for hardware-in-the-loop (HIL) testing environment.